0

IN THIS ISSUE

Newest Issue


Research Papers

J. Electron. Packag. 2019;141(3):031001-031001-6. doi:10.1115/1.4042981.

White light-emitting diodes (WLEDs) composed of blue LED chip, yellow phosphor, and red quantum dots (QDs) are considered as a potential alternative for next-generation artificial light source with their high luminous efficiency (LE) and color-rendering index (CRI) while QDs' poor temperature stability and the incompatibility of QDs/silicone severely hinder the wide utilization of QDs-WLEDs. To relieve this, here we proposed a separated QDs@silica nanoparticles (QSNs)/phosphor structure, which composed of a QSNs-on-chip layer with a yellow phosphor layer above. A silica shell was coated onto the QDs surface to solve the compatibility problem between QDs and silicone. With CRI > 92 and R9 > 90, the newly proposed QSNs-based WLEDs present 16.7% higher LE and lower QDs working temperature over conventional mixed type WLEDs. The reduction of QDs' temperature can reach 11.5 °C, 21.3 °C, and 30.3 °C at driving current of 80 mA, 200 mA, and 300 mA, respectively.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2019;141(3):031002-031002-13. doi:10.1115/1.4042984.

Thermal interface materials (TIMs) are crucial elements for packaging of power electronics. In particular, development of high-temperature lead-free die-attach TIMs for silicon carbide wide bandgap power electronics is a challenge. Among major options, sintered silver shows advantages in ease of applications. Cost, performance, reliability, and integration are concerns for technology implementation. The current study first discusses issues and status reported in literatures. Then it focuses on cost reduction and performance improvement of sintered silver using enhancement structures at micro- and nano-scales. A few design architectures are analyzed by finite element methods. The feasibility of strengthening edges and corners is also assessed. The downside of potential increase of unfavorable stresses to accelerate void coalescence would be optimized in conjunction with design concept of power electronics package modules for paths of solutions in the form of integrated systems. Demands of developing new high-temperature packaging materials to enable optimized package designs are also highlighted.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2019;141(3):031004-031004-11. doi:10.1115/1.4042983.

There are various designs for segregating hot and cold air in data centers such as cold aisle containment (CAC), hot aisle containment (HAC), and chimney exhaust rack. These containment systems have different characteristics and impose various conditions on the information technology equipment (ITE). One common issue in HAC systems is a pressure build-up inside the HAC (known as backpressure). Backpressure also can be present in CAC systems in case of airflow imbalances. Hot air recirculation, limited cooling airflow rate in servers, and reversed flow through ITE with weaker fan systems (e.g., network switches) are some known consequences of backpressure. Currently, there is a lack of experimental data on the interdependency between overall performance of ITE and its internal design when backpressure is imposed on ITE. In this paper, three commercial 2-rack unit (RU) servers with different internal designs from various generations and performance levels are tested and analyzed under various environmental conditions. Smoke tests and thermal imaging are implemented to study the airflow patterns inside the tested equipment. In addition, the impact of hot air leakage into the servers through chassis perforations on the fan speed and the power consumption of the servers are studied. Furthermore, the cause of the discrepancy between measured inlet temperatures by the intelligent platform management interface (IPMI) and external sensors is investigated. It is found that arrangement of fans, segregation of space upstream and downstream of fans, leakage paths, the location of baseboard management controller (BMC) sensors, and the presence of backpressure can have a significant impact on ITE power and cooling efficiency.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2019;141(3):031005-031005-5. doi:10.1115/1.4042982.

In this study, we realized a cylindrical tuber silicone layer for improving the light efficiency of chip-on-board light-emitting diodes (COB-LEDs) by fabricating patterned LED substrate with both silicone-wetting and silicone-repellency surfaces. To realize silicone-repellency surface, low surface energy modified nanosilica particles were prepared and deposited on the LED substrate to form porous hierarchical structure. Light efficiency enhancement for blue light COB-LEDs with pure cylindrical tuber silicone layer and white light COB-LEDs with phosphor–silicone composite layer was studied. The results show that for blue light COB-LEDs with pure cylindrical tuber silicone layer, the light efficiency increases with the contact angle and a highest light efficiency enhancement of 62.6% was achieved at 90 deg when compared to the flat silicone layer. For white light COB-LEDs at correlated color temperature (CCT) of ∼5500 K, the cylindrical tuber silicone layer enhances the light efficiency by 13.6% when compared to the conventional flat phosphor layer.

Commentary by Dr. Valentin Fuster

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In