The use of PBGA (plastic ball grid array) electronic packages has been greatly increased in the last decade due to high I/O densities offered. The fatigue life prediction for them is a relatively new task in the electronic field. PBGA packages have more complex geometry than conventional SMT (surface mount technology) packages, such as Leaded and Leadless Chip Carriers (LDCC and LLCC), in which the I/O pins are distributed along the perimeters of chip carriers and their geometries are suitable for two-dimensional (2-D) finite element (FE) simulation. This choice is not so clear in PBGAs. In this study, sectional 2-D, sliced three-dimensional (3-D), and 1/8th 3-D FE models for PBGA assemblies are compared to determine the appropriate FE models that are able to save computational time and memory while maintaining reasonable calculation accuracy. The comparisons and merits of each modeling approach are discussed. An energy-based method is used to predict the fatigue life for solder joints in PBGAs. The fatigue coefficients in the correlation equation, which were obtained previously from the analysis of traditional SMT packages, are updated for more accurate prediction. New fatigue coefficients are obtained for different modeling approaches.

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