Measurement of Thermal Deformation of Interconnect Layers Using SIEM¹

In the push to faster speed, lower power consumption, and reduced crosstalk, the conventional dielectric material SiO is going to be replaced by the materials with low dielectric constants. Although the current design that uses Cu and SiO dielectric material has achieved good reliability in wire bonding and flip-chip packages, whether or not the Cu-low k design can have the same reliability in these packages is unknown. Also, with decreasing dimensions and increasing complexity, thermal strains due to the mismatch of coefficients of thermal expansion are localized in very tiny zones with high magnitudes. Therefore, it is essential to find an experimental way to ensure interconnect layers to achieve required reliability. SIEM (Speckle Interferometry with Electron Microscopy) is a micro-mechanics measurement technique that has a spatial resolution approaching a few nanometers. It is able to perform the full field displacement mapping over a region of only several microns in diameter. The purpose of this paper is to demonstrate the capability of SIEM, which can perform a direct and in-situ measurement of local deformation fields of interconnection layers of an electronic chip.