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Research Papers

New Electronic Packaging Method for Potted Guidance Electronics to Sustain Temperature Cycling and Survive High-G Applications

[+] Author and Article Information
N. H. Chao, D. E. Carlucci

U. S. Army,
ARDEC,
Picatinny Arsenal, NJ 07806-5000

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received June 4, 2018; final manuscript received December 26, 2018; published online March 1, 2019. Assoc. Editor: Tse Eric Wong. This material is declared a work of the U.S. Government and is not subject to copyright protection in the United States. Approved for public release; distribution is unlimited.

J. Electron. Packag 141(2), 021003 (Mar 01, 2019) (12 pages) Paper No: EP-18-1047; doi: 10.1115/1.4042471 History: Received June 04, 2018; Revised December 26, 2018

Potted Guidance Electronics have been widely used in precision guided munitions. In the current generation of projectiles, soft potting materials have been sufficient to protect the electronics from the G-forces of gun launch at approximately 15 kG while sustaining uncontrolled extreme low temperature storage environments at different locations around the world. With on-going development of long-range precision guided munitions, stronger and hardened potting materials will be needed to survive gun-launch accelerations of 30 kG and higher. In the case of uncontrolled storage environments, the daily temperature fluctuations can act to dislodge/fail electronic components due to the coefficient of thermal expansion (CTE) mismatches between the potting materials and the electronic components. In this paper, a new protective layer method is presented, which consists of two tightly fitted preformed polymer layers, acting to mitigate the CTE mismatches, while only producing insignificant degradation of the supporting structure during extreme high-G projectile launch. The effectiveness of this new method is demonstrated by using finite element based modeling and simulation methods to examine a simplified potted electronics example. In the first step, the example was simulated with and without protective layers during an accelerated temperature cycling (−67 °F to 185 °F), and found that the protective layers were able to mitigate the CTE mismatch problem. During second step, the example compared dynamic responses between potted electronics with and without protective layers during a high-G, ∼15 kG, gun-launch simulations; results also showed that the degradation of the supporting structure introduced by protective layers during gun launch was insignificant.

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References

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Figures

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Fig. 2

Projectile open depot2

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Fig. 3

A potted electronics with a circuit board and two components (illustration only)

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Fig. 4

Axial-Z, balloting X, balloting Y accelerations [3]

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Fig. 5

High amplitude and frequency around “set forward”

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Fig. 6

Simplified depiction of U.S. patents (9,254,588, 9,860,992, 9,900,988, and 15/874,963—pending)

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Fig. 7

A tightly fitted protective layer on printed circuit board (PCB) [5]

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Fig. 8

A new electronics packaging method

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Fig. 10

Leadless cip carrier

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Fig. 11

An exploded of the potted electronic assembly

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Fig. 12

An exploded of the potted electronic assembly with protective layers

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Fig. 13

Temperature cycling profile (second versus °F) (apply to external surfaces of the potted electronics assembly)

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Fig. 15

External forces applied to capacitor surface from potting materials during a temperature cycling process (without protective layers)

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Fig. 16

Force from potting imposed to capacitor surfaces at various time stamp (arrows indicate surface force direction)

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Fig. 17

External forces applied to capacitor surface from potting materials during a temperature cycling process (with protective layers)

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Fig. 18

Superposition of temperature cycling profile and external forces applied to capacitor surface

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Fig. 19

Dynamics simulation displacement data collection points

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Fig. 20

A tiny supporting structure added to protective layer

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Fig. 21

PCB deflections at 70 °F

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Fig. 22

PCB deflections at −67 °F

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Fig. 23

PCB deflections at 70 °F versus at −67 °F

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Fig. 24

PCB deflections at 70 °F including without tiny support

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Fig. 25

Munition tin-whisker growth control using PC-20M epoxy [16]

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Fig. 26

structural features created on inside surface of the CAN [17]

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Fig. 27

Measured component dimensional tolerances (MAXIM 8 L μMax/μSOP)

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Fig. 28

Time temperature superposition approach [19,20]

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