Research Papers

Void Detection in Dielectric Films Using a Floating Network of Substrate-Embedded Electrodes

[+] Author and Article Information
Stephen H. Taylor

Cooling Technologies Research Center,
School of Mechanical Engineering,
Purdue University,
West Lafayette, IN 47907

Suresh V. Garimella

Cooling Technologies Research Center,
School of Mechanical Engineering,
Purdue University,
West Lafayette, IN 47907
e-mail: sureshg@purdue.edu

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received October 6, 2013; final manuscript received July 18, 2014; published online September 19, 2014. Assoc. Editor: Ashish Gupta.

J. Electron. Packag 136(4), 041007 (Sep 19, 2014) (11 pages) Paper No: EP-13-1115; doi: 10.1115/1.4028075 History: Received October 06, 2013; Revised July 18, 2014

A sensor is developed for simple, in situ characterization of dielectric thermal interface materials (TIMs) at bond line thicknesses less than 100 μm. The working principle is based on the detection of regions of contrasting electric permittivity. An array of long, parallel electrodes is flush-mounted into each opposing substrate face of a narrow gap interface, and exposed to the gap formed between the two surfaces. Electrodes are oriented such that their lengthwise dimension in one substrate runs perpendicular to those in the other. A capacitance measurement taken between opposing electrodes is used to characterize the interface region in the vicinity of their crossing point (junction). The electric field associated with each electrode junction is numerically simulated and analyzed. Criteria are developed for the design of electrode junction geometries that localize the electric fields. The capacitances between floating-ground electrodes in the electrode sensor configuration employed give rise to a nontrivial network of interacting capacitances which strongly influence the measured response at any junction. A generalized solution for analyzing the floating network response is presented. The technique is used to experimentally detect thermal grease spots of 0.2 mm to 1.8 mm diameter within a 25 μm interface gap. It is necessary to use the generalized solution to the capacitance network developed in this work to properly delineate regions of contrasting permittivity in the interface gap region using capacitance measurements.

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Garimella, S. V., Fleischer, A. S., Murthy, J. Y., Keshavarzi, A., Prasher, R., Patel, C., Bhavnani, S. H., Venkatasubramanian, R., Mahajan, R., Joshi, Y., Sammakia, B., Myers, B. A., Chorosinski, L., Baelmans, M., Sathyamurthy, P., and Raad, P. E., 2008, “Thermal Challenges in Next-Generation Electronic Systems,” IEEE Trans. Compon. Packag. Technol., 31(4), pp. 801–815. [CrossRef]
Haque, S., Lu, G. Q., Goings, J., and Sigmund, J., 2000, “Characterization of Interfacial Thermal Resistance by Acoustic Micrography Imaging,” Microelectron. Reliab., 40(3), pp. 465–476. [CrossRef]
Gowda, A., Esler, D., Tonapi, S., Zhong, A., Srihari, K., and Schattenmann, F., 2006, “Micron and Submicron-Scale Characterization of Interfaces in Thermal Interface Material Systems,” ASME J. Electron. Packag., 128(2), pp. 130–136. [CrossRef]
Hu, X., Jiang, L., and Goodson, K. E., 2004, “Thermal Characterization of Eutectic Alloy Thermal Interface Materials With Void-Like Inclusions,” 20th IEEE Semiconductor Thermal Measurement and Management Symposium, San Jose, CA, March 9–11, pp. 98–103. [CrossRef]
Gupta, A., Liu, Y., Zamora, N., and Paddock, T., 2006, “Thermal Imaging for Detecting Thermal Interface Issues in Assembly and Reliability Stressing,” 10th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM '06), San Diego, CA, May 30–June 2, pp. 942–945. [CrossRef]
Erturk, H., 2011, “Evaluation of Image Reconstruction Algorithms for Nondestructive Characterization of Thermal Interfaces,” Int. J. Therm. Sci., 50(6), pp. 906–917. [CrossRef]
Islam, N., Lee, S., Lee, J., Ka, Y., Khim, J., and Galloway, J., 2010, “TIM Selection Methodology for High Power Flip Chip Packages,” 12th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), Las Vegas, NV, June 2–5. [CrossRef]
Prasser, H. M., Bottger, A., and Zschau, J., 1998, “A New Electrode-Mesh Tomograph for Gas–Liquid Flows,” Flow Meas. Instrum., 9(2), pp. 111–119. [CrossRef]
Da Silva, M. J., Schleicher, E., and Hampel, U., 2007, “Capacitance Wire-Mesh Sensor for Fast Measurement of Phase Fraction Distributions,” Meas. Sci. Technol., 18(7), pp. 2245–2251. [CrossRef]
Szalinski, L., Abdulkareem, L. A., Da Silva, M. J., Thiele, S., Beyer, M., Lucas, D., Hernandez Perez, V., Hampel, U., and Azzopardi, B. J., 2010, “Comparative Study of Gas–Oil and Gas–Water Two-Phase Flow in a Vertical Pipe,” Chem. Eng. Sci., 65(12), pp. 3836–3848. [CrossRef]
Da Silva, M. J., Thiele, S., Abdulkareem, L., Azzopardi, B. J., and Hampel, U., 2010, “High-Resolution Gas–Oil Two Phase Flow Visualization With a Capacitance Wire-Mesh Sensor,” Flow Meas. Instrum., 21(3), pp. 191–197. [CrossRef]
Schubert, M., Kryk, H., and Hampel, U., 2010, “Slow-Mode Gas/Liquid-Induced Periodic Hydrodynamics in Trickling Packed Beds Derived From Direct Measurement of Cross-Sectional Distributed Local Capacitances,” Chem. Eng. Process., 49(10), pp. 1107–1121. [CrossRef]
Matusiak, B., Da Silva, M. J., Hampel, U., and Romanowski, A., 2010, “Measurement of Dynamic Distributions in a Fixed Bed Using Electrical Capacitance Tomography and Capacitance Wire-Mesh Sensor,” Ind. Eng. Chem. Res., 49(5), pp. 2070–2077. [CrossRef]
Azzopardi, B. J., Abdulkareem, L. A., Zhao, D., Thiele, S., Da Silva, M. J., Beyer, M., and Hunt, A., 2010, “Comparison Between Electrical Capacitance Tomography and Wire Mesh Sensor Output for Air/Silicone Oil Flow in a Vertical Pipe,” Ind. Eng. Chem. Res., 49(18), pp. 8805–8811. [CrossRef]
Paranjape, S., Ritchey, S. N., and Garimella, S. V., 2012, “Electrical Impedance-Based Void Fraction Measurement and Flow Regime Identification in Microchannel Flows Under Adiabatic Conditions,” Int. J. Multiphase Flow, 42, pp. 175–183. [CrossRef]
Ogawa, K., Minkov, D., Shoji, T., Sato, M., and Hashimoto, H., 1999, “NDE of Degradation of Thermal Barrier Coating by Means of Impedance Spectroscopy,” Nondestr. Test. Eval. Int., 32(3), pp. 177–185. [CrossRef]
Wang, X., Mei, J., and Xiao, P., 2010, “Non-Destructive Evaluation of Thermal Barrier Coatings Using Impedance Spectroscopy,” J. Eur. Ceram. Soc., 21(7), pp. 855–859. [CrossRef]
Fletcher, R., 1970, “A New Approach to Variable Metric Algorithms,” Comput. J., 13(3), pp. 317–322. [CrossRef]
Analog Devices Inc., 2005, “24-Bit Capacitance-to-Digital Converter With Temperature Sensor: AD7745/AD7746,” Analog Devices Inc., Norwood, MA.
Laird Technologies Inc., 2009, Data Sheet: “Tgrease 1500 Series Thermal Grease,” Laird Technologies, London, http://lairdtech.thomasnet.com/item/thermally-conductive-grease/tgrease-8482-1500/pn-4024


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Fig. 1

Schematic diagram of proposed device configuration for characterization of dielectric interfaces

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Fig. 2

Domain of interest for a single electrode pair, composed of the gap region between two substrates

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Fig. 3

Top view of domain of interest for sample case (L = 5 mm; H = 0.25 mm; w = 1 mm; pmin = 3.37 mm). The shaded region of the top electrode surface corresponds to the contour plot in Fig. 4.

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Fig. 4

Top: contour plot of electric field on the lower surface of the top electrode. The one-quarter domain is shown corresponding to the shaded region in Fig. 3. Bottom: dependence of capacitance along the electrode length.

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Fig. 5

Plot of dimensionless capacitance versus normalized gap thickness η for several values of normalized electrode length Λ. The behavior of an ideal parallel-plate capacitor of area w × w is shown for comparison.

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Fig. 6

Minimum pitch for parallel electrodes normalized such that a value of 0 corresponds to an electrode pitch equal to the electrode width, and a value of 1 correspond to an electrode pitch equal to the electrode length. The results are shown for several values of electrode length Λ as a function of gap thickness.

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Fig. 7

Schematic diagram of a two-by-two system of electrodes. The desired capacitance measurement junction is shown as a solid black arrow.

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Fig. 8

Circuit network created by an M × N array of electrodes. For the case shown, M = N = 5, h = 2, and k = 4.

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Fig. 9

Layout of the square matrix, A, of dimension MN + M + N, describing the circuit network. The system is shown as a compilation of six submatrices.

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Fig. 10

Experimental test unit with an M = N = 5 electrode array. The two acrylic substrates are shown placed flush together.

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Fig. 11

Comparison of experimental capacitance measurements with predictions from a representative junction simulation and the network model as a function of gap size H

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Fig. 12

Theoretical and experimental results for an empty air gap, H = 25 μm, in fF: (a) network model results, (b) experimental results, and (c) model error

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Fig. 13

Baseline estimate for empty air gap, H = 25 μm in fF: (a) single junction simulation, (b) reverse network model calculation on experimental data providing the calibrated baseline, and (c) model error

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Fig. 14

Photograph of the grease spot for case 2 between the horizontal electrode underneath and vertical electrode above (left) and with top substrate removed (right)

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Fig. 15

Graphic illustration of grease spots used in the experiment, drawn to scale

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Fig. 16

Data analysis steps for Case 1 showing capacitance in fF: (a) experimentally measured values, (b) junction capacitance map obtained by solving the reverse network model using measured values (junction values lower than the baseline values in (b) are highlighted in yellow), and (c) junction capacitance map using the constrained reverse network model. The darkened cell indicates that the junction detection zone contains grease.

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Fig. 17

Capacitance change for the six different grease-spot cases shown in Figure 15 inside a 25 um gap, in fF. Junctions affected by the presence of grease in their detection zones are darkened.



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