Research Papers

Reliability-Based Design Guidance of Three-Dimensional Integrated Circuits Packaging Using Thermal Compression Bonding and Dummy Cu/Ni/SnAg Microbumps

[+] Author and Article Information
Chang-Chun Lee

Department of Mechanical Engineering,
R&D Center for Microsystem Reliability,
Center for Biomedical Technology,
Chung Yuan Christian University,
200 Chungpei Road,
Chungli, Taoyuan 32023, Taiwan

Po Ting Lin

Department of Mechanical Engineering,
R&D Center for Microsystem Reliability,
Center for Biomedical Technology,
Chung Yuan Christian University,
200 Chungpei Road,
Chungli, Taoyuan 32023, Taiwan
e-mail: potinglin@cycu.edu.tw

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received October 30, 2013; final manuscript received February 4, 2014; published online May 5, 2014. Assoc. Editor: Yi-Shao Lai.

J. Electron. Packag 136(3), 031006 (May 05, 2014) (9 pages) Paper No: EP-13-1123; doi: 10.1115/1.4026854 History: Received October 30, 2013; Revised February 04, 2014

In the latest microelectronics industry, the emerging three-dimensional (3D) chip stacking technique using through silicon via (TSV) enables higher integration density that allows greater numbers of interconnections in order to fulfill the urgent requirements of dimensional downscaling and electrical speed enhancement. A high-density pitch of microbumps associated with the wafer-level underfill (WLUF) under a thermal compressions process are utilized to prevent the thermomechanical failures of the microbumps due to variations of thermal expansions of different materials in the 3D package. The use of dummy microbumps has been proposed to find the acceptable thin-layer uniformity and the reliable mechanical performances of the entire packaging structure. The warpage and strain behavior of packaging structure has been simulated by finite element analysis (FEA) and compared with experimental results. The responses were parametrically modeled using Kriging model with respect to compressive force, the thickness of the top chip, and the location of the dummy microbumps. The deterministic design guidance for warpage and strain has been obtained from the Kriging model. Furthermore, the reliability of the design under uncertainty has been investigated. A reliability-based design guidance (RBDG) has been proposed to provide a safety boundary in terms of the allowable reliability index. The proposed method can be utilized as the reliability standard for high-throughput production of 3D integrated circuits (ICs) packaging.

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Fig. 1

Simulation models of 3D ICs packaging using WLUF and microbumps. (a) 2D FEA at the specified cutting line; (b) Cu/Ni/SnAg microbumps; and (c) meshed model of a microbump.

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Fig. 2

Temperature-dependent stress/strain curve of solder material [7]

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Fig. 3

Numerical results: (a) distribution of warpage (millimeter) in the packaging after the thermal compression process and (b) distribution of von Mises strain in the microbumps at the corner region of the die

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Fig. 4

SEM images of microbump assembly: (a) assembly with WLUF and (b) cross section of the SnAg interconnection

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Fig. 5

Gap distance between the top chip and the substrate at (a) the center and (b) the edge regions of microbump array after a 2.0 kg bonding process

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Fig. 6

A failure mode of microbump assembly with WLUF after a thermal-compression procedure

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Fig. 7

Warpage estimations of FEA for the center and edge regions of a packaging structure under a loading of 2.0 kg bonding force

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Fig. 8

Layout designs of the dummy microbumps at the distances of (a) 30, (b) 60, and (c) 90 μm from the critical microbumps

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Fig. 9

3D contours of response surfaces of (a) warpage and (b) strain with respect to the design variables

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Fig. 10

Deterministic design guidance in various levels of allowable (a) warpage and (b) strain (D = 0)

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Fig. 11

Probabilistic design guidance in various levels of allowable (a) warpage and (b) strain (D = 0)



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