Technical Briefs

Tungsten Carbide as a Diffusion Barrier on Silicon Nitride Active- Metal-Brazed Substrates for Silicon Carbide Power Devices

[+] Author and Article Information
H. A. Mustain, William D. Brown

Department of Electrical Engineering, 3217 Bell Engineering Center, University of Arkansas, Fayetteville, AR 72701

Simon S. Ang

Department of Electrical Engineering, 3217 Bell Engineering Center, University of Arkansas, Fayetteville, AR 72701siang@uark.edu

J. Electron. Packag 131(3), 034502 (Jul 14, 2009) (3 pages) doi:10.1115/1.3153582 History: Received December 02, 2008; Revised April 27, 2009; Published July 14, 2009

Recently, silicon nitride (Si3N4) has been receiving renewed attention because of its potential use as a substrate material for packaging of silicon carbide (SiC) power devices for high temperature applications. It is an attractive material for this application because it has moderate thermal conductivity and a low coefficient of thermal expansion, which is close to that of SiC. Materials that show promise for use as a diffusion barrier on Si3N4 substrate for bonding SiC devices to a Si3N4 substrate are refractory metals such as titanium (Ti), molybdenum (Mo), tungsten (W), and their alloys. Tungsten carbide (WC) shows promise as a diffusion barrier for bonding these devices to copper metallization on Si3N4 substrates. This paper presents the results of an investigation of a metallization stack (Si3N4/Cu/WC/Ti/Pt/Ti/Au) used to bond SiC dice to Si3N4 substrates. The dice were bonded using transient liquid phase bonding. Samples were characterized using X-ray diffraction for phase identification and Auger electron spectroscopy for depth profiling of the elemental composition of the metallization stack in the as-deposited state, and immediately following annealing. The metallization remained stable following subjection to a temperature of 400°C for 100 h in air.

Copyright © 2009 by American Society of Mechanical Engineers
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Grahic Jump Location
Figure 1

Metallization stack on a Si3N4 AMB substrate, not drawn to scale

Grahic Jump Location
Figure 2

Metallization stack of Cu/WC/Ti/Pt/Ti/Au on Si3N4 substrates at 400°C in air (a) as-deposited, (b) after 48 h, and (c) 100 h

Grahic Jump Location
Figure 3

AES chemical depth profile of Au, Ti, Pt, Ti, WC, and Cu for the metallization stack on a Si3N4 substrate (a) as-deposited, (b) after 48 h anneal, and (c) after 100 h anneal at 400°C



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