The Effect of Underfill and Underfill Delamination on the Thermal Stress in Flip-Chip Solder Joints

[+] Author and Article Information
S. Rzepka

Technische Universitaet Dresden, Institut fuer Halbleiter-und Mikrosystemtechnik, D-01062 Dresden, Germany

M. A. Korhonen, C.-Y. Li

Cornell University, Department of Materials Science and Engineering, Ithaca, NY 14853

E. Meusel

Dresden University of Technology, Department of Electrical Engineering, D-01062 Dresden, Germany

J. Electron. Packag 120(4), 342-348 (Dec 01, 1998) (7 pages) doi:10.1115/1.2792644 History: Received February 15, 1998; Revised August 10, 1998; Online November 06, 2007


The stresses occurring in the solder joints during thermal loads have been studied by finite element analysis. Besides the cases of no underfill and perfect adhesion, underfill delaminations at the interfaces to the solder, to the chip, and to the substrate surfaces, respectively, have been considered. The simulation results indicate that rapid failing of the flip-chip modules due to delamination can be prevented effectively by using an underfill that has a high Young’s modulus at room temperature (even 20 GPa are not too high) and a CTE slightly lower than solder. Since the ultimate failure is always caused by growing of a major crack, the damage integral concept is valid for lifetime estimations even in the case of FC modules with underfill.

Copyright © 1998 by The American Society of Mechanical Engineers
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