Optimization of Enhanced Surfaces for High Flux Chip Cooling by Pool Boiling

[+] Author and Article Information
I. Mudawar, T. M. Anderson

Boiling and Two-Phase Flow Laboratory, School of Mechanical Engineering, Purdue University, West Lafayette, IN 47907

J. Electron. Packag 115(1), 89-100 (Mar 01, 1993) (12 pages) doi:10.1115/1.2909306 History: Received May 05, 1992; Revised November 17, 1992; Online April 28, 2008


A high flux electronic chip was numerically and experimentally simulated to investigate pool boiling capabilities of enhanced metallic surface attachments built upon a 12.7 × 12.7 mm2 base area. It is shown how experimental nucleate boiling data for a flat chip and for chips with low-profile microstructures can be used as input boundary conditions in the numerical prediction of boiling performances of high flux, smooth and microstructured extended cylindrical surfaces. A technique for extending the applicability of the numerical results to cylindrical fin arrays is demonstrated with the aid of experimental data obtained for these surfaces. Surface enhancement resulted in chip planform heat fluxes of 105.4 and 159.3 W/cm2 , for saturated and 35°C subcooled FC-72, respectively.

Copyright © 1993 by The American Society of Mechanical Engineers
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