Research Papers

J. Electron. Packag. 2011;133(4):041001-041001-8. doi:10.1115/1.4005299.

Thermal analysis with comprehensive treatment of conjugate heat transfer is performed in this study for discrete flush-mounted heat sources in a horizontal channel cooled by air. The numerical model accounts for mixed convection, radiative exchange and two-dimensional conduction in the substrate. The model is first used to simulate available experimental work to demonstrate its accuracy and practical utility. A parametric study is then undertaken to assess the effects of Reynolds number, surface emissivity of walls and heat sources, as well as thickness and thermal conductivity of substrate, on flow field and heat transfer characteristics. It is shown that due to radiative heat transfer, the wall temperatures are brought closer, and the trend of temperature variation along the top wall is significantly altered. Such effects are more pronounced for higher surface emissivity and/or lower Reynolds numbers. The influence of substrate conductivity and thickness is related in that a large value of either substrate conductivity or thickness facilitates redistribution of heat and tends to yield a uniform temperature field in the substrate. For highly conductive or thick substrate, the “hot spot” cools down and may occur in upstream sources. Radiation loss to the ambient increases with substrate conductivity and thickness due to the elevated temperature near the openings, yet the total heat transfer over the bottom surface by convection and radiation remains essentially unaltered.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041002-041002-31. doi:10.1115/1.4005300.

Boiling water in small channels that are formed along turbine blades has been examined since the 1970s as a means to dissipating large amounts of heat. Later, similar geometries could be found in cooling systems for computers, fusion reactors, rocket nozzles, avionics, hybrid vehicle power electronics, and space systems. This paper addresses (a) the implementation of two-phase microchannel heat sinks in these applications, (b) the fluid physics and limitations of boiling in small passages, and effective tools for predicting the thermal performance of heat sinks, and (c) means to enhance this performance. It is shown that despite many hundreds of publications attempting to predict the performance of two-phase microchannel heat sinks, there are only a handful of predictive tools that can tackle broad ranges of geometrical and operating parameters or different fluids. Development of these tools is complicated by a lack of reliable databases and the drastic differences in boiling behavior of different fluids in small passages. For example, flow boiling of certain fluids in very small diameter channels may be no different than in macrochannels. Conversely, other fluids may exhibit considerable “confinement” even in seemingly large diameter channels. It is shown that cutting-edge heat transfer enhancement techniques, such as the use of nanofluids and carbon nanotube coatings, with proven merits to single-phase macrosystems, may not offer similar advantages to microchannel heat sinks. Better performance may be achieved by careful optimization of the heat sink’s geometrical parameters and by adapting a new class of hybrid cooling schemes that combine the benefits of microchannel flow with those of jet impingement.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041003-041003-10. doi:10.1115/1.4005375.

Potted electronics are becoming more common in precision-guided artillery due to demands for increased structural-robustness. In field artillery applications, the potted electronics are inactive for most of their lifetime. Projectiles may be stored in a bunker without environmental (temperature and humidity) controls for up to 20 years. In contrast, the electronics for most commercial applications tend to be active for most of their lifetime and the operating environment is more predictable. This difference makes the thermal management task for the artillery application challenging. The ability to accurately analyze these designs requires the use of fully coupled thermal-stress transient-analysis with accurate material properties over the full temperature range. To highlight the thermal-stress transient effects, the potted configuration of a typical electronics assembly is analyzed. The thermal analysis indicates that significant stresses can develop in critical locations as a result of temperature cycles. The structural dynamic responses of unpotted and potted assemblies, subjected to gun-launch environments, are also compared. The results indicate that for the potted design, the dynamic response of the processor board is attenuated by the potting material.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041004-041004-7. doi:10.1115/1.4005289.

Finite element modeling (FEM) is an important component in the design of reliable chip-to-substrate connections. However, FEM can quickly become complex as the number of input/output connections increases. Three-dimensional (3D) chip-substrate models are usually simplified where only portions of the chip-substrate structure is considered in order to conserve computer resources and time. Chip symmetry is often used to simplify the models from full-chip structures to quarter or octant models. Recently, an even simpler 3D model, general plane deformation (GPD) slice model, has been used to characterize the properties of the full-chip and local regions on the structures, such as in the structures for solder ball fatigue. In this study, the accuracy of the GPD model is examined by comparing the mechanical behavior of a flip-chip, copper pillar package from various full and partial chip models to that of the GDP model. In addition, it is shown that the GPD model can be further simplified to a half-GPD model by using the symmetry plane in the middle of the slice and choosing the proper boundary conditions. The number of nodes required for each model and the accuracy of the different FEM models are compared. Analysis of the maximum stress in the silicon chip shows that the full-chip model, quarter model, and octant model all convergence to the same result. However, the GPD and half-GPD models, with the previously used boundary conditions, converge to a different stress values from that of the full-chip models. The error in the GPD models for small, 36 I/O package was 4.7% compared to the more complete, full-chip FEM models. The displacement error in the GPD models was more than 50%, compared to the full-chip models, and increased with larger structures. The high displacement error of the GPD models was due to the ordinarily used boundary conditions which neglect the effect from adjacent I/O on the sidewall of the GPD slice. An optimization equation is proposed to account for the spatial variation in the stress on the GPD sidewall. The GPD displacement error was reduced from 50% to 3.3% for the 36 pillar array.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041005-041005-12. doi:10.1115/1.4005290.

This paper investigates the use of thermoelectric (TE) devices for thermal management of downhole electronics. The research carried out will help in the mitigation of costs associated with thermal damage of downhole electronics used in oil drilling industry. An experimental set up was prepared where a TE device was used in conjunction with heat exchanger and a cold plate to remove heat from electronics module. A finned copper rod in contact with hot side of TE device was used to reject the heat out to the ambient. The experimental set up was housed inside a cylindrical vacuum flask, which was in turn placed inside an oven to simulate thermally harsh downhole conditions. Experiments were carried out with electronics heat dissipation of 0–8 W and ambient temperature of 140 °C. Due to the differences in the environmental conditions of the laboratory and the practical downhole scenario, the experiment could not completely capture the conditions of downhole heat rejection. A mathematical model of the experimental apparatus was prepared and validated against the experimental results. The model was used to predict performance of a TE device for thermal management of downhole electronics at an ambient temperature of 200–250 °C. It was observed that the ability of the thermal management system to keep electronics cool varied from 30 °C to a few degrees below the surrounding temperature, for chip wattage varying from 0 W to 8 W, respectively.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041006-041006-14. doi:10.1115/1.4005293.

Polymeric material has been applied in electronic product extensively, especially for packaging applications, thus thermomechanical analyses for encapsulated structure are frequently encountered. However, modulus and thermally induced strain of polymeric material are not constant, but time- and temperature-dependence. For simplification of the stress constitutive models, particularly for applications on electronic packaging can be found in literature, the time-dependent behavior could be neglected. Otherwise, the property only considered as a function of temperature can achieve time saving and cost down, but to the best of the author’s knowledge, the thermomechanical analysis based on different conservation laws so far has not been studied indeed. Most of the relative studies published in literature are in strain conservation law, and recently strain–stress conservation law was formulated, so-called force-displacement incremental solution. This study has developed a stress-based conservation law regardless of derived strain and strain–stress based conservation laws for stress constitutive models applied in thermomechanical analysis; meanwhile, incorporated cross-link induced residual strain from polymer forming. Furthermore, the nonincrement approach is implemented by a concept of force and moment equilibrium on the flexural stiffness of final stage, and derived for efficiency enhancing. On the other hand, analytical solutions based on different conservation laws for bimaterial plate were utilized to compare with experimental measurements. The results indicate that warpage analysis based on stress conservation law with temperature-dependent property can be more realistically predicted over a range of temperature, whereas a large error can be caused by using approximated CTE or nonconsidering residual strain, especially for temperature above Tg .

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041007-041007-3. doi:10.1115/1.4005295.

Silver (Ag) foils are bonded to alumina substrates by a low temperature solid state bonding process. The alumina substrate is premetalized with 40 nm titanium tungsten (TiW) and 2.54 μm gold (Au). The bonding temperature is just 260 °C, compatible with the peak reflow temperature of lead-free (Pb-free) solders used in electronic industries. The Ag foil is quite soft and ductile. It can deform to mate with the Au surface on alumina. Thus, only 1000 psi of static pressure is needed to bring Ag atoms and Au atoms within atomic distance on the interface. Ag has superior physical properties. It has the highest electrical and thermal conductivities among the metals. Scanning electron microscope (SEM) images show that the Ag foil is well bonded to the Au layer on alumina. A standard shear test is performed to determine the shear strength of the bonding. The shear strength of five samples tested far exceeds the strength requirement of MIL-STD-883 G standard.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041008-041008-8. doi:10.1115/1.4005296.

In this paper, we rely on the Constructal method to optimize the geometry of a Y-shaped cavity embedded into a solid conducting wall. The structure has four degrees of freedom. The objective is to minimize the global thermal resistance between the solid and the cavity. The optimization procedure has demonstrated that for larger solids, a cavity shaped as T led to a minimization of the global thermal resistance, while the opposite effect is observed for tall solids, where the optimal shapes are reached when the bifurcated branches deeply penetrates the solid in the vertical direction, according to the Constructal principle of “optimal distribution of imperfections”. The three times minimized global thermal resistance of the Y-shaped cavity has been correlated by power laws as a function of its corresponding optimal configurations. Finally, the performance of the Y-shaped intrusion proved to be superior to that of other basic geometries: the optimized global thermal resistances of the Y-shaped cavities obtained for H/L = 1.0, 2.0, and 5.0 were, respectively 66.61%, 55.37%, and 19.05% lower than the optimal T-shaped cavities under the same thermal and geometric conditions. Furthermore, in comparison with the “finger cavity” shaped as C, the Y-shaped cavities increased the thermal performance in 109.12%, 84.45%, 59.32%, and 20.10% for H/L = 0.5, 1.0, 2.0, and 5.0, respectively.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041009-041009-7. doi:10.1115/1.4005297.

Thermal management has been a critical issue for the safe running of an electronic device. Driving liquid metal with low melting point to extract heat from the thermal source is highly efficient because of its superior thermophysical properties over conventional coolant such as water or the like. In this paper, utilizing thermosyphon effect to drive room temperature liquid metal for electronic cooling was proposed for the first time with its technical feasibility demonstrated. This may lead to a self supported cooling which just utilizes the waste heat produced by the hot chip to drive the flow of liquid metal. And the device thus fabricated will be the one without any external pump and moving elements inside. A series of conceptual experiments under different operational conditions were performed to evaluate the cooling performance of the new method. Meanwhile, the results were also compared with that of water cooling by ways of thermal infrared graph and temperatures acquired by thermocouples. According to the measurements, it was found that the cooling performance of liquid metal was much stronger than that of water, and this will become even better with the increase of heat load, and height difference between the cooler and heater. A theoretical thermal resistance model was established and convective heat transfer coefficient was calculated to interpret the phenomenon with uncertainty analyzed. With further improvement of the present system and liquid metal coolant, this method is expected to be flexibly useful for heat dissipation of light-emitting diode (LED) street lamp, desk computer and radio remote unit (RRU), where confined space, efficient cooling, low energy consumption, dust-proof and water-proof are critically requested.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041010-041010-10. doi:10.1115/1.4005090.

The development of portable electronics poses design challenges when evolving new designs for high strain-rate life cycle loading, such as in drop events, blast events, vibration, ultrasonic process steps, etc. This paper discusses an experimental investigation of the transient response of a portable electronic product and its subassemblies to dynamic mechanical loading encountered in drop and shock conditions. The portable electronic product tested in this study consists of a circuit card assembly and a battery pack supported in a two-piece plastic housing with a separate battery compartment. Dynamic loading, consisting of various shock profiles, is applied using an electrodynamic shaker. A number of drop tests are also conducted on a drop tower. Fourier transform technique (FFT) is utilized to analyze the dynamic response of the printed wiring board and the plastic housing in the frequency domain. Tests at the subassembly level are used to study the dynamic response of the individual constituents. The nonlinear interactions due to dynamic contact between these subassemblies are then investigated through shock and drop testing at the system level. These results will be used in a subsequent study to investigate the ability of finite element models to accurately capture this transient response of complex portable electronic assemblies under shock and drop loading. The long-term goal of this combined study is to demonstrate a systematic modeling methodology to predict the drop response of future portable electronic products, so that relevant failure modes can be eliminated by design iterations early in the design cycle.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041011-041011-15. doi:10.1115/1.4005298.

Three dimensional (3D) integration offers numerous electrical advantages like shorter interconnection distances between different dies in the stack, reduced signal delay, reduced interconnect power and design flexibilities. The main enabler of 3D integration is through-silicon-vias (TSVs) and stacking of multiple dies. Irrespective of these advantages, thermal management in 3D stacks poses significant challenges for the implementation of 3D integrated circuits. Even though extensive research work has been done in understanding the thermal management in two dimensional (2D) planar circuits for the past several decades, 3D integration offers a new set of challenges in terms of thermal management, which makes it difficult to readily apply the thermal management strategies available for 2D planar circuits. Over the past decade, some work has been done in thermal analysis and management of 3D stacks but still, knowledge is scattered and a comprehensive understanding is lacking. This research work focuses on bringing together the limited work on thermal analysis and thermal management in 3D vertically integrated circuits available in the literature. A compilation and analysis of the results from investigations on thermal management in 3D stacks is presented in this review with special emphasis on experimental studies conducted on different thermal management strategies. Furthermore, 3D integration technologies, thermal management challenges, and advanced 2D thermal management solutions are discussed.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041012-041012-12. doi:10.1115/1.4005091.

In this study, the transient response of electronic assemblies to mechanical loading encountered in drop and shock conditions are investigated with transient finite element methods. Many manufacturers face design challenges when evolving new designs for high strain-rate life cycle loading. Examples of high strain-rate loading include drop events, blast events, vibration, ultrasonic process steps, etc. New design iterations invariably bring new unexpected failure modes under such loading and costly trial-and-error design fixes are often necessary after the product is built. Electronics designers have long sought to address these effects during the design phase, with the aid of computational models. However, such efforts have been difficult because of the nonlinearities inherent in complex assemblies and complex dynamic material properties. Our goal in this study is to investigate the ability of finite element models to accurately capture the transient response of a complex portable electronic product under shock and drop loading. Finite element models of the system are generated and calibrated with experimental results, first at the subsystem level to calibrate material properties and then at the product level to parametrically investigate the contact mechanics at the interfaces. The parametric study consists of sensitivity studies for different ways to model soft, nonconservative contact, as well as structural damping of the subassembly under assembly boundary conditions. The long-term goal of this study is to demonstrate a systematic modeling methodology to predict the drop response of future portable electronic products, so that relevant failure modes can be eliminated by design iterations early in the design cycle.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041013-041013-9. doi:10.1115/1.4005451.

Reliable drop test simulations of electronic packages require reliable material characterization of solder joints. Mechanical properties of lead-free solder were here experimentally investigated for both monotonic and cyclic loading at different strain rates. With regards to the observed complex material behavior, the nonlinear mixed hardening Armstrong and Frederick model combined with the Perzyna viscoplastic law was chosen to fit the experimental data. This model was subsequently implemented into a commercial finite element code and used to simulate drop tests. Actual drop test experiments were conducted in parallel and experimental results were compared to simulations. Prediction discrepancies were analyzed and explanations suggested.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041014-041014-6. doi:10.1115/1.4005294.

When two thin plates or layers are bonded together, an extremely thin bond layer of third material exists between the two layers. This research work examines the effect of bond layer on the interfacial shearing and peeling stresses in a bimaterial model. Earlier papers on this topic are based on several mutually contradictory expressions for the shear compliance of the bond layer. This paper is aimed at resolving this ambiguity and presents derivation of shear compliance on a rational basis. A numerical example is carried out for a silicon-copper system with a gold-tin solder bond layer. The results obtained are likely to be useful in interfacial stress evaluation and physical design of bimaterial assemblies used in microelectronics and photonics applications.

Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):041015-041015-7. doi:10.1115/1.4005291.

Although thermal performance is always a critical issue in electronic packaging design at every packaging level, there is a significant lack of reliable and efficient thermal modeling and analysis techniques at the silicon chip level. Sharp temperature increases within small areas, which are called “hot spots”, often occur in silicon chips. For more efficient designs, the temperature and location of hot spots need to be predicted with acceptable accuracy. With millions of transistor gates acting as heat sources, accurate thermal modeling and analysis of silicon chips at micrometer level has not been possible using conventional techniques. In the present study, an efficient and accurate multi-level thermal modeling and analysis technique has been developed. The technique combines finite element analysis sub-modeling and a superposition method for more efficient modeling and simulation. Detailed temperature distribution caused by a single heat source is obtained using the finite element sub-modeling technique, while the temperature rise distribution caused by multiple heat sources is obtained by superimposing the finite element analysis result. Using the proposed thermal modeling methodology, one case of finite element analysis with a single heat source is sufficient for modeling a silicon chip with millions of transistors acting as heat sources. When the whole package is modeled using the finite element method, the effect of the package and its boundary conditions are also included in the superposition results, which makes it possible to model a large number of transistors on a silicon chip. The capabilities of the proposed methodology are demonstrated through a case study involving thermal modeling and analysis of a microprocessor chip with 4 × 106 transistors.

Commentary by Dr. Valentin Fuster

Technical Briefs

J. Electron. Packag. 2011;133(4):044501-044501-6. doi:10.1115/1.4005288.

Demand for long-term reliability of electronic packaging has lead to a large number of studies on viscoplastic behavior of solder alloys. Various creep models for solder alloys have been proposed. They range from purely empirical to mechanism based models where dislocation motion and diffusion processes are taken into account. In this study, most commonly used creep models are compared with the test data and implemented in ABAQUS to compare their performance in cycling loading. Finally, a new creep model is proposed that combines best features of many models. It is also shown that, while two creep models may describe the same material stress–strain rate curves equally well, they may yield very different results when utilized for cycling loading. One interesting observation of this study is that the stress exponent, n., also depends on the grain size.

Topics: Creep , Alloys , Solders
Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):044502-044502-4. doi:10.1115/1.4005292.

In this paper, the packaging aspects of directly modulated laser (DML) modules are investigated using detailed electromagnetic (EM) simulations. The packaging influences of the laser module are specified in two parts as RF connector and optoelectronic subsystem. By carefully optimizing the package structure, the simulation results show that the insertion loss of the proposed module is less than 1 dB up to 40 GHz. Then, a DML module is packaged and measured based on the optimized package scheme. A resonance free bandwidth of approximately 20 GHz is obtained with a 3 dB bandwidth of about 15 GHz.

Commentary by Dr. Valentin Fuster


J. Electron. Packag. 2011;133(4):045501-045501-3. doi:10.1115/1.4000901.
This Discussion is submitted with the understanding that the authors would respond only to the technical issues with appropriate proofs and not address unrelated items and attack others’ work.
  • The authors have employed their new yield function, Eq. (12), to plot the yield surfaces both for the compressive and tensile yields in Fig. 3, by using the same material parameters for both compression and tension behavior. Authors state that the yield function is valid for continuous yield in all directions and for continuous yield in both compression and tension. However, the compression and tension responses of materials usually are different, so the parameters should be different; hence, the yield behaviors will be different and cannot be continuous both for compression and tension. Also, the behavior under different stress paths (e.g., compression and tension) will be different, and the yield surfaces will be different in the in the J1-J2D space, Fig. 3; for instance, the intercepts proportional to the compressive and tensile strengths along the √J2D -axis (Fig. 3) will be different, which would introduce a discontinuity between the surfaces for compression and tension. Hence, the authors’ claim that their function, Eq. (12), provides continuous yield in all directions and under both tension and compression (page 150, paragraph after Eq. (12)) may not be valid. Only in the case when the behaviors under all stress paths, e.g., tension and compression, are identical, which is indeed rare, the function may be continuous over both zones, Fig. 3. In view of the above, the authors’ claim that they have developed the new function to correct the deficiency of the HISS function (in the tensile zone) appears to be unfounded, because their function will not be continuous for the tensile yield if different and realistic parameters were used for compression and tension.Suggested Response: Authors can prove their claim by showing plots of continuous yield using their function for typical stress paths, e.g., compression and tension, by using parameters from laboratory tests data for a material whose behavior is different under both pathsOR they could state in their response or rebuttal that their function can provide continuous yield only when the material behavior is the same for all stress paths, i.e., in all directions.
  • The statement that “HISS is not a true continuous yield function [19]” on page 149 (line 2 after Eq. 7) may not be correct; because the HISS function is continuous for the loading and stress space it is defined for. For example, it is continuous for the compressive yield for geologic materials; indeed, as explained below, it is not valid and not continuous for the tensile yield. The authors’ statement also contradicts their earlier statement on page 148 (paragraph 1, section 2.3), which says that “The HISS yield function represents a unification of the above trends, including the various prior functions as special cases” (e.g., critical state, CAP,Mohr-Coulomb, Drucker Prager); the authors have cited Desai [1] for this statement. Then they themselves say, “The HISS-δ0 yield function has been used extensively for solder as well as a wide range of other materials, to provide continuous yield response.” Note also that the authors have categorized (page 148, paragraph 1, section 2.3) the critical state and CAP functions as “continuous yield functions.” How can the HISS function unify other continuous yield functions, contain them as special cases, and provide continuous yield response for a wide range of materials, and then end up not continuous? For predominant compressive loading materials such as geologic, the HISS model is valid and continuous only for the compressive yield, because the parameters determined from compression tests are used. If the parameters for other stress paths such as tension were used, the yield surfaces for each can be different. This is analogous to the well-known and classical Mohr-Coulomb model (for geologic materials) where the strength envelope is valid for compression and not for tension because the tensile strength is different from the compressive strength. Similarly, for predominant tension loading materials such as metals and solders, the HISS model is valid and continuous for tensile yield, and is not valid for compressive yield, because the parameters from tension tests are commonly used (Chia [50], Desai et al.  [48]). If parameters from other types of tests, e.g., shear and compression, etc., were used (with certain assumptions), they (models) should be validated as described in item No. 4 below. Because the yield function (HISS) for geologic materials is not valid for the tensile zone, very often a different model is used when the material experiences tensile condition during (finite element) computations, e.g., Desai and coworkers (see references cited in Desai [1]) have used the model based on the “stress transfer” approach proposed by Zienkiewicz et al.  (1968), and Scarpas et al.  (1997) have used the Hoffman model. Hence, the issues such as the unconstrained thermal loading in the tensile zone raised by the authors are irrelevant and unwarranted.Suggested Response: Authors could withdraw statement like “HISS is not a true continuous yield function” because HISS is continuous for the stress space it is defined for, e.g., for compressive for geologic or tensile for metallic materialsOR authors should provide proof that it (HISS) is not continuous in the compressive stress space, for geologic materials.
  • Roscoe et al.  (1958) are credited with the first identification of the continuous yield behavior, i.e., plastic or irreversible deformation can occur almost from the start of loading for the soils tested by them. As the title, “Description of Stress-Strain Curves by Three Parameters,” in the paper by Ramberg Osgood (1943) suggests, the Ramberg-Osgood equation used by Rafanelli is a mathematical function to fit the curve passing through a number of data points, Fig. 2 in Rafanelli [3]. The use of such a function would result into a piecewise linear or nonlinear elastic model (Desai and Siriwardane, 1984). Thus, the Rafanelli model is based on the theory of elasticity and does not include plastic or irreversible deformations and continuous yield behavior. Furthermore, it does not involve the use of the yield and hardening functions required for the theory of plasticity. Hence, the citation by the authors to Rafanelli [3], page 148 (column 1, line 22), for the continuous-yield behavior can be erroneous. Roscoe et al.  (1958) should have been cited for the development of continuous yield, and Chia [50] and Desai et al.  [48] for its modification and implementation in the HISS/DSC model for solders in electronic packaging. Desai and coworkers (Desai [1]) have used the continuous yield behavior based on Roscoe et al’s work with the HISS/DSC models for geologic and other materials; the authors appear to have also used the same concept from Roscoe et al. ; for this reason, they could use the yield function, Eq. 12, and the hardening function, Eq. 15, in their plasticity formulation. The Rafanelli model does not use the theory of plasticity, and therefore, there can be no rationale to define continuous yield behavior, as it is known in the profession, from the Rafanelli model because continuous yield behavior requires that almost every point on the stress-strain response is a yield point with plastic strain.Suggested Response: Provide proof that Ramberg Osgood model used by Rafanelli is “continuous yield plasticity” modelOR state that it was not proper to assign continuous yield behavior to Rafanelli (3); in fact, the continuous yield behavior was developed byRoscoeet al. (1958).
  • It is a normal requirement that a (new) constitutive model should be validated at the specimen level with respect to (1) the test data used for finding its parameters, which is termed as Level 1 or curve fitting validation, (2) with respect to independent tests not used to find the parameters (Level 2), and (3) for the boundary value problem(s) with comparison of predictions with measurements for chip-substrate packages using solution (finite element) procedures, which is termed the Level 3 validation. Level 1 validation is desirable, but Levels 2 and/or 3 are essential. Moreover, it is required to validate a (new) model with respect to significant factors such as stress paths (e.g., tension, compression, shear, and hydrostatic), volume change, and confining stress that influence the behavior of the material under consideration. Such validations are required for the reliability of the model and the parameters. The authors have performed essentially Level 1 or curve fitting validation, for the tests under the (shear) stress path from which the parameters were determined. Such an elementary (curve fitting) validation may not be sufficient and may not prove the validity of the proposed new model. It may be noted the research by Desai and coworkers involving the use of the HISS/DSC models, validations have been provided by following the above criteria, e.g., Wang (2001), from which the authors have adopted some parameters, has presented validations for stress-strain responses and predictions of measured behavior in a boundary value problem involving a TSOP package, by using the HISS/DSC model.Suggested Response: Provide validations (for the authors’ model) with respect to some independent test data that were not used to find the parameters. Such data are available from tests performed by Wang (2001) that have been used by the authors, and test data on solders with similar compositions are also available in the literature, OR state that this paper contains only limited validations with respect to tests used for finding the parameters. Additional independent validations will be performed in future research.
  • The authors have concluded on page 155 (second paragraph under Conclusions) that “Trapezoidal cycles indicate that the elastoplastic formulation is limited to relatively simple loading paths with constant strain rate.” However, in the paper, they have analyzed only the monotonic (shear) loading path and not any trapezoidal cycles. Hence, an explanation is needed how they arrived at this conclusion when they have not used trapezoidal loading cycles for the work presented in the paper.Suggested Response: Include analysis based on trapezoidal cycles to support the statements presented in the paperOR state that additional research would be required to support this conclusion.
Commentary by Dr. Valentin Fuster
J. Electron. Packag. 2011;133(4):045502-045502-5. doi:10.1115/1.4000902.

We respond to the technical content of the discussion as follows:

Topics: Electrons , Solders
Commentary by Dr. Valentin Fuster

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