0
Research Papers

Interconnect Fatigue Failure Parameter Isolation for Power Device Reliability Prediction in Alternative Accelerated Mechanical Cycling Test

[+] Author and Article Information
Mahsa Montazeri, Cody J. Marbut

Department of Mechanical Engineering,
University of Arkansas,
Fayetteville, AR 72701

David Huitink

Department of Mechanical Engineering,
University of Arkansas,
Fayetteville, AR 72701
e-mail: dhuitin@uark.edu

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received October 31, 2018; final manuscript received February 27, 2019; published online May 24, 2019. Assoc. Editor: Ercan Dede.

J. Electron. Packag 141(3), 031011 (May 24, 2019) (11 pages) Paper No: EP-18-1099; doi: 10.1115/1.4043480 History: Received October 31, 2018; Revised February 27, 2019

In this work, a rapid and low-cost accelerated reliability test methodology which was designed to simulate mechanical stresses induced in flip–chip bonded devices during the thermal cycling reliability test under isothermal conditions, is introduced and demonstrated using power device analogous test chips. By stressing these devices in a controlled environment, mechanical stresses become decoupled from the design and temperature, such that useful lifetimes can be predictable. Mechanical shear stress was cyclically applied directly to device relevant, flip–chip solder interconnects while monitoring for failure. Herein, finite element analysis (FEA) is used to extract various damage metrics of different solder materials, including PbSn37/63, SAC305, and nanosilver, in both thermal operation and the introduced alternative mechanical testing conditions. Plastic work density and strain are calculated in the critical solder interconnects as factors that indicate the amount of the damage accumulation per cycle during the mechanical cycling, thermal cycling, and power cycling tests. The number of cycles to failure for each test was calculated using the fatigue life model developed by Darveaux for eutectic PbSn solder, while for SAC305 Syed's method was used, and for nanosilver, the Knoerr et al. equations are applied. The effects of environmental temperature and shearing force frequency were studied for the mechanical cycling reliability test, where a modified Norris–Landzberg equation for mechanical cycling tests was explored using the simulation results. Finally, comparing the mechanical cycling with the equivalent thermal cycling and power cycling demonstrated a significant reduction in required test duration to achieve a reliability estimation.

FIGURES IN THIS ARTICLE
<>
Copyright © 2019 by ASME
Your Session has timed out. Please sign back in to continue.

References

Subramanian, K. , 2012, Reliability of Lead‐Free Electronic Solder Interconnects: Roles of Material and Service Parameters, Wily Press, Chichester, UK, Chap. 1.
Mattila, T. , Mueller, M. , and Paulasto-Kröckel, M. , 2010, “ Failure Mechanism of Solder Interconnections Under Thermal Cycling Conditions,” Electronic System-Integration and Technology Conference (ESTC), Berlin, Germany, Sept. 13–16, pp. 1–8.
De Vries, J. , Jansen, M. , and Van Driel, W. , 2007, “ On the Difference Between Thermal Cycling and Thermal Shock Testing for Board Level Reliability of Soldered Interconnections,” Microelectron. Reliab., 47(2–3), pp. 444–449. [CrossRef]
Laurila, T. , Mattila, T. , Vuorinen, V. , Karppinen, J. , Li, J. , Sippola, M. , and Kivilahti, J. K. , 2007, “ Evolution of Microstructure and Failure Mechanism of Lead-Free Solder Interconnections in Power Cycling and Thermal Shock Tests,” Microelectron. Reliab., 47(7), pp. 1135–1144. [CrossRef]
Barker, D. B. , Dasgupta, A. , and Pecht, M. G. , 1991, “ PWB Solder Joint Life Calculations Under Thermal and Vibrational Loading,” J. Inst. Environ. Sci., 35(1), pp. 17–25.
Darveaux, R. , and Banerji, K. , 1991, “ Fatigue Analysis of Flip Chip Assemblies Using Thermal Stress Simulations and a Coffin-Manson Relation,” IEEE 41st Electronics Components and Technology Conference (ECTC), Atlanta, GA, May 13–15, pp. 797–805.
Satoh, R. , Arakawa, K. , Harada, M. , and Matsui, K. , 1991, “ Thermal Fatigue Life of Pb-Sn Alloy Interconnections,” IEEE Trans. Compon., Hybrids, Manuf. Technol., 14(1), pp. 224–232. [CrossRef]
Darveaux, R., Banerji, K., and Mawer, A., 1995, Reliability of Plastic Ball Grid Array Assembly, McGraw-Hill, New York, Chap. 13.
Darveaux, R. , 2000, “ Effect of Simulation Methodology on Solder Joint Crack Growth Correlation,” IEEE 50th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, May 21–24, pp. 1048–1058.
Syed, A. , 2004, “ Accumulated Creep Strain and Energy Density Based Thermal Fatigue Life Prediction Models for SnAgCu Solder Joints,” IEEE 54th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, June 4, pp. 737–746.
Marbut, C. J. , Montazeri, M. , and Huitink, D. R. , 2018, “ Rapid Solder Interconnect Fatigue Life Test Methodology for Predicting Thermomechanical Reliability,” IEEE Trans. Device Mater. Reliab., 18(3), pp. 412–421. [CrossRef]
Khorramdel, B. , Kraft, T. M. , and Mäntysalo, M. , 2017, “ Inkjet Printed Metallic Micropillars for Bare Die Flip-Chip Bonding,” Flexible Printed Electron., 2(4), p. 045005. [CrossRef]
JEDEC, 2014, “ Temperature Cycling,” JEDEC Solid State Technology Association, Arlington, VA, Standard No. JESD22-A104E.
JEDEC, 2007, “Power Cycling,” JEDEC Solid State Technology Association, Arlington, VA, Standard No. JESD22-A122A.
Knoerr, M. , Kraft, S. , and Schletz, A. , 2010, “ Reliability Assessment of Sintered Nano-Silver Die Attachment for Power Semiconductors,” Electronic Packaging and Technology Conference (EPTC), Singapore, Dec. 8–10, pp. 56–61.
Mysore, K. , Subbarayan, G. , and Gupta, V. , 2009, “ Constitutive and Aging Behavior of Sn3. 0Ag0. 5Cu Solder Alloy,” IEEE Trans. Electron. Packag. Manuf., 32(4), pp. 221–232. [CrossRef]
Yu, D. , Chen, X. , and Chen, G. , 2009, “ Applying Anand Model to Low-Temperature Sintered Nanoscale Silver Paste Chip Attachment,” Mater. Des., 30(10), pp. 4574–4579. [CrossRef]
Seal, S., Glover, M. D., and Wallace, A. K., 2016, “Flip-Chip Bonded Silicon Carbide MOSFETs as a Low Parasitic Alternative to Wire-Bonding,” IEEE Forth Workshop on Wide Bandgap Power Devices and Applications (WiPDA), Fayetteville, AR, Nov. 7-9, pp. 194–199.
Qualitek, 2014, “Technical Data Sheet: Sn42/Bi58 Solder Wire,” Qualtek Electronics Corporation, Addison, IL, Accessed May 13, 2019, https://www.qualitek.com/sn42_bi58_solder_wire_tech_data.pdf
Qualitek, 2014, “Technical Data Sheet: Sn95/Sb5 Solder Wire,” Qualtek Electronics Corporation, Addison, IL, Accessed May 13, 2019, https://www.qualitek.com/p825hf_sb5_tds.pdf
Lau, J.H., 2010, Reliability of ROHS-compliant 2D and 3D IC Interconnects, McGraw-Hill Professional, New York, Chap. 2.
Salmela, O., 2007, “Acceleration Factors for Lead-Free Solder Materials,” IEEE Trans. Compon. Packag. Technol., 30(4) pp. 700–707. [CrossRef]
Vasudevan, V., and Fan, X., 2008, “An Acceleration Model for Lead-Free (SAC) Solder Joint Reliability Under Thermal Cycling,“ IEEE 58th Electronic Components and Technology Conference, Lake Buena Vista, FL, May 27–30, pp. 139–145.

Figures

Grahic Jump Location
Fig. 1

Schematic view of the silicon die with solder placements

Grahic Jump Location
Fig. 2

(a) Mechanical cycling test setup and (b) boundary and load condition of half symmetry model for mechanical cycling simulation

Grahic Jump Location
Fig. 3

Accumulated plastic work density per cycle in (a) PbSn and (b) SAC305 solder materials and (c) accumulated plastic strain per cycle for nanosilver during the mechanical cycling test as a function of the applied cyclic mechanical shear at various isothermal conditions

Grahic Jump Location
Fig. 4

Effects of cycling frequency on damage accumulation at various loads at (a) 22 °C and (b) 85 °C temperature for SAC305

Grahic Jump Location
Fig. 5

Estimation of Norris–Landzberg equation parameters: (a) n-parameter and (b) E/k parameter, for eutectic SnPb solder

Grahic Jump Location
Fig. 6

Estimation of Norris–Landzberg equation parameters: (a) n-parameter and (b) E/k parameter, for SAC305 solder material

Grahic Jump Location
Fig. 7

Estimation of Norris–Landzberg equation parameters: (a) n-parameter and (b) E/k parameter, for nanosilver solder

Grahic Jump Location
Fig. 8

Relationship between accumulated plastic work (Sn63Pb37, SAC305) and plastic work amplitude (nanosilver) and maximum shear stress during various temperature cycle conditions

Grahic Jump Location
Fig. 9

Plastic work accumulation in power cycling profile (condition on top) for various solders evaluated

Grahic Jump Location
Fig. 10

Plastic work accumulation rate versus effective stress

Grahic Jump Location
Fig. 11

Accumulated plastic work versus log CTF

Grahic Jump Location
Fig. 12

SEM image of a Sn42/Bi47.6/Ag0.4 joint of a Si MOSFET. Multiple crack fronts are visible.

Grahic Jump Location
Fig. 13

Load cell output for sample 7 showing force versus cycles with accumulation (plastic) region shown

Grahic Jump Location
Fig. 14

Volumetric plastic work accumulation versus accumulation rate

Tables

Errata

Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In