Research Papers

Enhanced Sintered Silver for SiC Wide Bandgap Power Electronics Integrated Package Module

[+] Author and Article Information
Mei-Chien Lu

Monte Rosa Technology,
San Francisco Bay Areas, CA 95070
e-mail: mclumailbox@gmail.com

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received October 31, 2018; final manuscript received February 7, 2019; published online April 10, 2019. Assoc. Editor: Changqing Chen.

J. Electron. Packag 141(3), 031002 (Apr 10, 2019) (13 pages) Paper No: EP-18-1100; doi: 10.1115/1.4042984 History: Received October 31, 2018; Revised February 07, 2019

Thermal interface materials (TIMs) are crucial elements for packaging of power electronics. In particular, development of high-temperature lead-free die-attach TIMs for silicon carbide wide bandgap power electronics is a challenge. Among major options, sintered silver shows advantages in ease of applications. Cost, performance, reliability, and integration are concerns for technology implementation. The current study first discusses issues and status reported in literatures. Then it focuses on cost reduction and performance improvement of sintered silver using enhancement structures at micro- and nano-scales. A few design architectures are analyzed by finite element methods. The feasibility of strengthening edges and corners is also assessed. The downside of potential increase of unfavorable stresses to accelerate void coalescence would be optimized in conjunction with design concept of power electronics package modules for paths of solutions in the form of integrated systems. Demands of developing new high-temperature packaging materials to enable optimized package designs are also highlighted.

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Fig. 1

A typical power electronics package module and key components

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Fig. 2

Bondline thickness of thermal interface materials to achieve thermal resistance of 0.1 mm2 K/W

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Fig. 3

Total energy change of sintering includes both densification and coarsening factors

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Fig. 4

Sintering of a nanoparticle to various shapes of objects from same bulk materials

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Fig. 5

(a) Model system with an embedded rounded pillar and (b) the mesh

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Fig. 6

Stress fields with single enhancement structure

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Fig. 7

Copper pillar arrays enhancement structures

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Fig. 8

Model system with focus areas for data analysis: (a) quarter of model system with enhancement structures and highlighted central region and (b) enlarged boxed areas of (a) with three line sections

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Fig. 9

Comparison of stress and strain fields between model system without enhancement structures ((a)–(c)) and model system with enhancement structures ((d)–(f)) on von Mises stresses (VMIS), von Mises strains (strain), and out-of-plane stresses (SIZZ): (a) von Mises stresses, (b) von Mises strains, (c) out-of-plane stresses, (d) von Mises stresses, (e) von Mises strains, and (f) out-of-plane stresses

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Fig. 10

Stresses and strains along three line sections in model systems with and without copper pillar arrays: (a) von Mises stresses in model systems with or without copper pillars (P) along line section 410, (b) von Mises strains in TIM at line sections 395 (5 μm) and 325 (75 μm) below TIM to SiC interface, (c) von Mises stresses in TIM along line sections 395 and 325 in model system with or without copper pillars (P), and (d) Stresses in TIM along thin silver layer at 5 μm below SiC and TIM interface on line section 395

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Fig. 11

Stress and strain fields in silver part of TIM: (a) von Mises stresses, (b) von Mises strains, (c) out-of-plane stresses, and (d) in-plane stresses

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Fig. 12

(a) von Mises stresses and (b) out-of-plane stresses in model system without copper pillar arrays in TIM

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Fig. 13

von Mises stresses in model system (a) without enhancement structures and (b) with enhancement structures

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Fig. 14

A SiC power electronics package module using copper pins instead of wire bond



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