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Effect of the Crystallinity on the Electromigration Resistance of Electroplated Copper Thin-Film Interconnections

[+] Author and Article Information
Takeru Kato

Department of Finemechanics,
Graduate School of Engineering,
Tohoku University,
6-6-11-716, Aoba Aramaki, Aobaku,
Sendai, Miyagi 980-8579, Japan
e-mail: takeru.kato@rift.mech.tohoku.ac.jp

Ken Suzuki

Fracture and Reliability Research Institute,
Graduate School of Engineering,
Tohoku University,
6-6-11-716, Aoba Aramaki, Aobaku,
Sendai, Miyagi 980-8579, Japan

Hideo Miura

Fracture and Reliability Research Institute,
Graduate School of Engineering,
Tohoku University,
6-6-11-716, Aoba Aramaki, Aobaku,
Sendai, Miyagi 980-8579, Japan
e-mail: hmiura@rift.mech.tohoku.ac.jp

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received December 17, 2016; final manuscript received April 7, 2017; published online June 12, 2017. Assoc. Editor: S. Ravi Annapragada.

J. Electron. Packag 139(2), 020911 (Jun 12, 2017) (7 pages) Paper No: EP-16-1144; doi: 10.1115/1.4036442 History: Received December 17, 2016; Revised April 07, 2017

Dominant factors of electromigration (EM) resistance of electroplated copper thin-film interconnections were investigated from the viewpoint of temperature and crystallinity of the interconnection. The EM test under the constant current density of 7 mA/cm2 was performed to observe the degradation such as accumulation of copper atoms and voids. Formation of voids and the accumulation occurred along grain boundaries during the EM test, and finally the interconnection was fractured at the not cathode side but at the center part of the interconnection. From the monitoring of temperature of the interconnection by using thermography during the EM test, this abnormal fracture was caused by large Joule heating of itself under high current density. In order to investigate the effect of grain boundaries on the degradation by EM, the crystallinity of grain boundaries in the interconnection was evaluated by using image quality (IQ) value obtained from electron backscatter diffraction (EBSD) analysis. The crystallinity of grain boundaries before the EM test had wide distribution, and the grain boundaries damaged under the EM loading mainly were random grain boundaries with low crystallinity. Thus, high density of Joule heating and high-speed diffusion of copper atoms along low crystallinity grain boundaries accelerated the EM degradation of the interconnection. The change of Joule heating density and activation energy for the EM damage were evaluated by using the interconnection annealed at 400 °C for 3 h. The annealing of the interconnection increased not only average grain size but also crystallinity of grains and grain boundaries drastically. The average IQ value of the interconnection was increased from 4100 to 6200 by the annealing. The improvement of the crystallinity decreased the maximum temperature of the interconnection during the EM test and increased the activation energy from 0.72 eV to 1.07 eV. The estimated lifetime of interconnections is increased about 100 times by these changes. Since the atomic diffusion is accelerated by not only the current density but also temperature and low crystallinity grain boundaries, the lifetime of the interconnections under EM loading is a strong function of their crystallinity. Therefore, it is necessary to evaluate and control the crystallinity of interconnections quantitatively using IQ value to assure their long-term reliability.

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References

Alam, M. T. , Pulavarthy, R. A. , Bielefeld, J. , King, S. W. , and Haque, M. A. , 2014, “ Thermal Conductivity Measurement of Low-k Dielectric Films: Effect of Porosity and Density,” J. Electron. Mater., 43(3), pp. 746–754. [CrossRef]
Hu, C. , Morgen, M. , Jain, P. S. H. , Gill, W. N. , Plawsky, J. L. , and Wayner, P. C., Jr. , 2000, “ Thermal Conductivity Study of Porous Low-k Dielectric Materials,” Appl. Phys. Lett., 77(1), pp. 145–147. [CrossRef]
Tu, K. N. , 2011, “ Reliability Challenges in 3D IC Packaging Technology,” Microelectron. Reliab., 51(3), pp. 517–523. [CrossRef]
Li, M. , and Tu, K. N. , 2016, “ Electromigration Induced Thermomigration in Microbumps by Thermal Cross-Talk Across Neighboring Chips in 2.5D IC,” IEEE International Reliability Physics Symposium (IRPS), Pasadena, CA, Apr. 17–21, pp. PA.3.1–PA.3.4.
Li, B. , Sullivan, T. D. , Lee, T. C. , and Badami, D. , 2004, “ Reliability Challenges for Copper Interconnects,” Microelectron. Reliab., 44(3), pp. 365–380. [CrossRef]
Shingubara, S. , Nakasaki, Y. , and Kaneko, H. , 1991, “ Electromigration in a Single Crystalline Submicron Width Aluminum Interconnection,” Appl. Phys. Lett., 58(42), pp. 42–44. [CrossRef]
Wang, Y. S. , Lee, W. H. , Chang, S. C. , Nian, J. N. , and Wang, Y. L. , 2013, “ An Electroplating Method for Copper Plane Twin Boundary Manufacturing,” Thin Solid Films, 544, pp. 157–161. [CrossRef]
Saito, N. , Murata, N. , Tamakawa, K. , Suzuki, K. , and Miura, H. , 2012, “ Evaluation of the Crystallinity of Grain Boundaries of Electronic Copper Thin Films for Highly Reliable Interconnections,” IEEE 62nd Electronic Components and Technology Conference (ECTC), San Diego, CA, May 29–June 1, Vol. 173, pp. 1153–1158.
Miura, H. , Suzuki, K. , and Tamakawa, K. , 2007, “ Fluctuation Mechanism of Mechanical Properties of Electroplated-Copper Thin Films Used for Three Dimensional Electronic Modules,” Key Eng. Mater., 353–358, pp. 2954–2957. [CrossRef]
Timalsina, Y. P. , Horning, A. , Spivey, R. F. , Lewis, K. M. , Kuan, T. , Wang, G. , and Lu, T. , 2015, “ Effects of Nanoscale Surface Roughness on the Resistivity of Ultrathin Epitaxial Copper Films,” Nanotechnology, 26(7), pp. 1–10. [CrossRef]
Hu, C.-K. , Rosenberg, R. , and Lee, K. Y. , 1999, “ Electromigration Path in Cu Thin-Film Lines,” Appl. Phys. Lett., 74(20), pp. 2945–2947. [CrossRef]
Lane, M. W. , Liniger, E. G. , and Lloyd, J. R. , 2003, “ Relationship Between Interfacial Adhesion and Electromigration in Cu Metallization,” J. Appl. Phys., 93(3), pp. 1417–1421. [CrossRef]
Hau-Riege, C. S. , and Thompsona, C. V. , 2001, “ Electromigration in Cu Interconnects With Very Different Grain Structures,” Appl. Phys. Lett., 78(22), pp. 3451–3453. [CrossRef]
Hu, C.-K. , Gignac, L. G. , Ohm, J. , Breslin, C. M. , Huang, E. , Bonilla, G. , Liniger, E. , Rosenberg, R. , Choi, S. , and Simon, A. H. , 2014, “ Microstructure, Impurity and Metal Cap Effects on Cu Electromigration,” AIP Conf. Proc., 1601(67), pp. 67–78.
Galand, R. , Brunetti, G. , Arnaud, L. , Rouvière, J.-L. , Clément, L. , Waltz, P. , and Wouters, Y. , 2013, “ Microstructural Void Environment Characterization by Electron Imaging in 45 nm Technology Node to Link Electromigration and Copper Microstructure,” Microelectron. Eng., 106, pp. 168–171. [CrossRef]
Lin, M.-H. , and Oates, A. S. , 2011, “ The Effects of Al Doping and Metallic-Cap Layers on Electromigration Transport Mechanisms in Copper Nanowires,” IEEE Trans. Device Mater. Reliab., 11(4), pp. 540–547. [CrossRef]
Murata, N. , Saito, N. , Tamakawa, K. , Suzuki, K. , and Miura, H. , 2015, “ Effect of Crystallographic Quality of Grain Boundaries on Both Mechanical and Electrical Properties of Electroplated Copper Thin Film Interconnections,” ASME J. Electron. Packag., 137(3), p. 031001. [CrossRef]
Suzuki, K. , Murata, N. , Saito, N. , Furuya, R. , Asai, O. , and Miura, H. , 2013, “ Improvement of Crystallographic Quality of Electroplated Copper Thin-Film Interconnections for Through-Silicon Vias,” Jpn. J. Appl. Phys., 52(4s), p. 04CB01. [CrossRef]
Sasagawa, K. , Hasegawa, M. , Saka, M. , and Abé, H. , 2002, “ Prediction of Electromigration Failure in Passivated Polycrystalline Line,” J. Appl. Phys., 91(11), pp. 9005–9014. [CrossRef]
Tu, K. N. , Yeh, C. C. , Liu, C. Y. , and Chen, C. , 2000, “ Effect of Current Crowding on Vacancy Diffusion and Void Formation in Electromigration,” Appl. Phys. Lett., 76(8), pp. 988–990. [CrossRef]
Choi, Z.-S. , Mönig, R. , and Thompson, C. V. , 2007, “ Activation Energy and Prefactor for Surface Electromigration and Void Drift in Cu Interconnects,” J. Appl. Phys., 102(8), p. 083509. [CrossRef]
Frankovic, R. , and Bernstein, G. H. , 1996, “ Electromigration Drift and Threshold in Cu Thin-Film Interconnects,” IEEE Trans. Electron Devices, 43(12), pp. 2233–2239. [CrossRef]
Huang, Y.-T. , Huang, C.-W. , Chen, J.-Y. , Ting, Y.-H. , Cheng, S.-L. , Liao, C.-N. , and Wu, W.-W. , 2016, “ Mass Transport Phenomena in Copper Nanowires at High Current Density,” Nano Res., 9(4), pp. 1071–1078. [CrossRef]
Black, J. R. , 1969, “ Electromigration—A Brief Survey and Some Recent Results,” IEEE Trans. Electron Devices, 16(4), pp. 338–347. [CrossRef]
Lloyd, J. R. , Clemens, J. , and Snede, R. , 1999, “ Copper Metallization Reliability,” Microelectron. Reliab., 39(11), pp. 1595–1602. [CrossRef]
Fan, C. , Asai, O. , Suzuki, K. , and Miura, H. , 2013, “ Effect of the Lattice Mismatch Between Copper Thin-Film Interconnection and Base Material on the Crystallinity of the Interconnection,” 14th International Conference on Electronic Materials and Packaging (EMAP), Lantau Island, Hong Kong, Dec. 13–16, Paper No. 2013-73147.
Asai, O. , Murata, N. , Suzuki, K. , and Miura, H. , 2013 “ Improvement of the Reliability of Thin-Film Interconnections Based on the Control of the Crystallinity of the Thin Films,” 14th International Conference on Electronic Materials and Packaging (EMAP), Lantau Island, Hong Kong, Dec. 13–16, Paper No. 2013-73149.
Murata, N. , Suzuki, K. , and Miura, H. , 2012, “ Quantitative Evaluation of the Crystallinity of Grain Boundaries in Polycrystalline Materials,” ASME Paper No. IMECE2012-87426.
Besser, P. , Marathe, A. , Zhao, L. , Herrick, M. , Capasso, C. , and Kawasaki, H. , 2000, “ Optimizing the Electromigration Performance of Copper Interconnects,” International Electron Devices Meeting (IEDM), San Francisco, CA, Dec. 10–13, pp. 119–122.
Yang, C.-C. , Li, B. , Baumann, F. H. , Li, J. , Edelstein, D. , and Rosenberg, R. , 2014, “ Microstructure Modulation in Copper Interconnects,” IEEE Electron Device Lett., 35(5), pp. 572–574. [CrossRef]
Jia, Y. , Zhonga, T. , Lia, Z. , Wanga, X. , Luoa, D. , Xiab, Y. , and Liua, Z. , 2004, “ Grain Structure and Crystallographic Orientation in Cu Damascene Lines,” Microelectron. Eng., 71(2), pp. 182–189. [CrossRef]
Nitta, T. , Ohmi, T. , Hoshi, T. , Sakai, S. , Sakaibara, K. , Imai, S. , and Shibata, T. , 1993, “ Evaluating the Large Electromigration Resistance of Copper Interconnects Employing a Newly Developed Accelerated Life‐Test Method,” J. Electrochem. Soc., 140(4), pp. 1131–1137. [CrossRef]
Frank, T. , Moreau, S. , Chappaz, C. , Leduc, P. , Arnaud, L. , Thuaire, A. , Chery, E. , Lorut, F. , Anghel, L. , and Poupon, G. , 2013, “ Reliability of TSV Interconnects: Electromigration, Thermal Cycling, and Impact on Above Metal Level Dielectric,” Microelectron. Reliab., 53(1), pp. 17–19. [CrossRef]
Miyajima, Y. , Aragaki, T. , Adachi, H. , Fujii, T. , Onaka, S. , and Kato, M. , 2012, “ Retardation of Softening of Ultrafine-Grained Copper During Low Temperature Annealing Under Uniaxial Tensile Stress,” Mater. Trans., 53(1), pp. 96–100. [CrossRef]
Lloyd, J. R. , and Clement, J. J. , 1995, “ Electromigration in Copper Conductors,” Thin Solid Films, 262(1–2), pp. 135–141. [CrossRef]

Figures

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Fig. 1

Schematic structure of the electroplated copper thin-film interconnection: (a) cross-sectional structure and (b) planar structure

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Fig. 2

Definition of IQ value of grain boundary

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Fig. 3

Experimental setup for the measurement of resistance and temperature during the EM test: (a) general view of EM test equipment and (b) enlarged view near interconnection sample

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Fig. 4

Change in the resistance of the interconnection during the EM test at 7 mA/cm2

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Fig. 5

Change in the surface morphology of the interconnection after the EM test: (a) left edge, (b) center (1000 μm from the left side), and (c) right edge of the interconnection

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Fig. 6

Distribution of number of newly grown voids during the EM test

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Fig. 7

Temperature distribution along the interconnection at the current density of 7 mA/cm2

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Fig. 8

Change of the surface morphology during the EM test: (a) SEM image before the EM test and (b) SEM image after the EM test

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Fig. 9

Distribution of IQ values in CSL and random grain boundaries

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Fig. 10

Effect of grain boundary character on the accumulation of copper atoms under EM loading: (a) grain boundary distribution and (b) random grain boundaries on SEM image

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Fig. 11

Effect of grain boundary character on the formation of voids under EM loading: (a) SEM image and (b) random grain boundaries on SEM image

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Fig. 12

Change in the crystallinity of interconnections: (a) as-electroplated, (b) annealed for 30 mins at 200 °C, and (c) annealed for 3 h at 400 °C (see color figure online)

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Fig. 13

Change in the IQ distribution of random grain boundaries by annealing

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Fig. 14

Change in the average temperature of the interconnections with applied current density

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Fig. 15

Change of the activation energy depending on the crystallinity of the interconnection

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Fig. 16

Estimated lifetime of as-electroplated (low crystallinity) and annealed (high crystallinity) interconnections

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