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Research Papers

Effect of Design Parameters on Thermomechanical Stress in Silicon of Through-Silicon Via

[+] Author and Article Information
Joo-Sun Hwang

Department of Nanotechnology
and Advanced Materials Engineering,
Sejong University,
209 Neungdong-ro,
Gwangjin-gu, Seoul 05006, South Korea
e-mail: tsv807@gmail.com

Seung-Ho Seo

Department of Nanotechnology
and Advanced Materials Engineering,
Sejong University,
209 Neungdong-ro,
Gwangjin-gu, Seoul 05006, South Korea
e-mail: seungho0709@gmail.com

Won-Jun Lee

Department of Nanotechnology
and Advanced Materials Engineering,
Sejong University,
209 Neungdong-ro,
Gwangjin-gu, Seoul 05006, South Korea
e-mail: wjlee@sejong.ac.kr

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received May 26, 2015; final manuscript received June 13, 2016; published online June 28, 2016. Assoc. Editor: Shi-Wei Ricky Lee.

J. Electron. Packag 138(3), 031006 (Jun 28, 2016) (4 pages) Paper No: EP-15-1054; doi: 10.1115/1.4033923 History: Received May 26, 2015; Revised June 13, 2016

We examined the effect of the design parameters of a through-silicon via (TSV) on the thermomechanical stress distribution at the bottom of the TSV using finite element analysis. Static analyses were carried out at 350 °C to simulate the maximum thermomechanical stress during postplating annealing. The thermomechanical stress is concentrated in the lower region of a TSV, and the maximum stress in silicon occurs at the bottom of the TSV. The TSV diameter and dielectric liner thickness were two important determinants of the maximum stress in the silicon. The maximum stress decreased with decreasing TSV diameter, whereas the effect of aspect ratio was negligible. A thick dielectric liner is advantageous for lowering the maximum stress in silicon. The minimum dielectric thickness resulting in a maximum stress less than the yield stress of silicon was 520, 230, and 110 nm for via diameters of 20, 10, and 5 μm, respectively. The maximum stress also decreased with the thickness of the copper overburden.

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References

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Figures

Grahic Jump Location
Fig. 8

The maximum von Mises stress as a function of both the copper overburden thickness and via diameter. The depth of the TSV and SiO2 liner thickness were fixed at 100 μm and 100 nm, respectively.

Grahic Jump Location
Fig. 7

The maximum von Mises stress as a function of the sidewall coverage of the SiO2 liner. The diameter and depth of the TSV were fixed at 10 and 100 μm, respectively. The SiO2 liner thickness at the planar top surface was assumed to be 100 nm.

Grahic Jump Location
Fig. 6

The maximum von Mises stress as a function of both SiO2 thickness and via diameter. The depth of the TSV was fixed at 100 μm.

Grahic Jump Location
Fig. 5

The von Mises stress distribution of a TSV with a scalloped sidewall. The diameter and depth of the TSV were fixed at 10 and 100 μm, respectively. The SiO2 liner thickness was 100 nm.

Grahic Jump Location
Fig. 4

The maximum von Mises stress as a function of the sidewall slope. The diameter and depth of the TSV were fixed at 10 and 100 μm, respectively. The SiO2 liner thickness was 100 nm.

Grahic Jump Location
Fig. 3

The maximum von Mises stress as functions of both the diameter and aspect ratio of the TSV. The SiO2 liner thickness was fixed at 100 nm.

Grahic Jump Location
Fig. 2

An example of the stress distribution calculated by ansys: (a) the entire area of the model and (b) the enlarged bottom part of the TSV. The diameter and depth of the TSV were fixed at 10 and 100 μm, respectively. The SiO2 liner thickness was 100 nm. The von Mises stress is concentrated at the bottom corner.

Grahic Jump Location
Fig. 1

Finite element analysis modeling of a TSV

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