Review Article

Nanothermal Interface Materials: Technology Review and Recent Results

[+] Author and Article Information
Avram Bar-Cohen

Fellow ASME
Defense Advanced Research Project
Agency (DARPA)/Microsystems
Technology Office (MTO),
675 North Randolph Street,
Arlington, VA 22203
e-mail: abc@darpa.mil

Kaiser Matin

System Planning Corporation,
3601 Wilson Blvd,
Arlington, VA 22201
e-mail: kaiser.matin.ctr@darpa.mil

Sreekant Narumanchi

National Renewable Energy Laboratory,
15013 Denver West Parkway,
Golden, CO 80401
e-mail: sreekant.narumanchi@nrel.gov

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received July 1, 2015; final manuscript received September 11, 2015; published online October 9, 2015. Assoc. Editor: Ashish Gupta.The United States Government retains, and by accepting the article for publication, the publisher acknowledges that the United States Government retains, a non-exclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this work, or allow others to do so, for United States Government purposes.

J. Electron. Packag 137(4), 040803 (Oct 09, 2015) (17 pages) Paper No: EP-15-1063; doi: 10.1115/1.4031602 History: Received July 01, 2015; Revised September 11, 2015

Thermal interface materials (TIMs) play a critical role in conventionally packaged electronic systems and often represent the highest thermal resistance and/or least reliable element in the heat flow path from the chip to the external ambient. In defense applications, the need to accommodate large differences in the coefficients of thermal expansion (CTE) among the packaging materials, provide for in-field reworkability, and assure physical integrity as well as long-term reliability further exacerbates this situation. Epoxy-based thermoplastic TIMs are compliant and reworkable at low temperature, but their low thermal conductivities pose a significant barrier to the thermal packaging of high-power devices. Alternatively, while solder TIMs offer low thermal interface resistances, their mechanical stiffness and high melting points make them inappropriate for many of these applications. Consequently, Defense Advanced Research Projects Agency (DARPA) initiated a series of studies exploring the potential of nanomaterials and nanostructures to create TIMs with solderlike thermal resistance and thermoplasticlike compliance and reworkability. This paper describes the nano-TIM approaches taken and results obtained by four teams responding to the DARPA challenge of pursuing the development of low thermal resistance of 1 mm2 K/W and high compliance and reliability TIMs. These approaches include the use of metal nanosprings (GE), laminated solder and flexible graphite films (Teledyne), multiwalled carbon nanotubes (CNTs) with layered metallic bonding materials (Raytheon), and open-ended CNTs (Georgia Tech (GT)). Following a detailed description of the specific nano-TIM approaches taken and of the metrology developed and used to measure the very low thermal resistivities, the thermal performance achieved by these nano-TIMs, with constant thermal load, as well as under temperature cycling and in extended life testing (aging), will be presented. It has been found that the nano-TIMs developed by all four teams can provide thermal interface resistivities well below 10 mm2 K/W and that GE's copper nanospring TIMs can consistently achieve thermal interface resistances in the range of 1 mm2 K/W. This paper also introduces efforts undertaken for next generation TIMs to reach thermal interface resistance of just 0.1 mm2 K/W.

Copyright © 2015 by ASME
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Fig. 1

NTI thermal resistance versus thickness compared to COTS technologies

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Fig. 2

Raytheon nTIM device overview. Multiwalled CNTs grown on both sides of a graphene or metallic foil; ends of CNTs are metalized to enhance adhesion.

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Fig. 3

Raytheon nTIM application

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Fig. 4

Comparison of Raytheon NTI performance with alternate TIMs

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Fig. 5

GE Compliant NTI TIM [19]

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Fig. 7

Teledyne NTI overview

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Fig. 8

Xenon flash technique

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Fig. 9

Steady-state ASTM test stand

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Fig. 10

PSTTR technique experimental setup

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Fig. 11

Thermal cycling and aging testing array

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Fig. 13

Silicon and copper coupons

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Fig. 14

Initial sample thermal resistance (mm2 K/W)

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Fig. 15

Acoustic images of samples from GT (left) and lead solder as a reference (right)

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Fig. 16

GT thermal aging results (mm2 K/W)

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Fig. 17

GT thermal cycling (low ramp rate) results (mm2 K/W)

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Fig. 18

GT thermal cycling (high ramp rate) results (mm2 K/W)

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Fig. 19

Initial sample thermal resistance (mm2 K/W)

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Fig. 20

Acoustic images of samples from Raytheon (left), GE (center), and Teledyne (right)

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Fig. 21

Raytheon thermal aging results (mm2 K/W)

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Fig. 22

GE thermal aging results (mm2 K/W)

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Fig. 23

Teledyne thermal aging results (mm2 K/W)

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Fig. 24

Raytheon thermal cycling (low ramp rate) results (mm2K/W)

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Fig. 25

GE thermal cycling (low ramp rate) results (mm2 K/W)

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Fig. 26

Teledyne thermal cycling (low ramp rate) results (mm2K/W)

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Fig. 27

Raytheon thermal cycling (high ramp rate) results (mm2 K/W)

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Fig. 28

GE thermal cycling (high ramp rate) results (mm2 K/W)

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Fig. 29

Teledyne thermal cycling (high ramp rate) results (mm2K/W)

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Fig. 30

High thermal conductivity fillers in metal matrix

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Fig. 31

Comparison of Cu/fBNNS with SOA TIMS

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Fig. 32

Metal nanowire array TIM [25]



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