0
Research Papers

Influence of Glass Transition Temperature of Underfill on the Stress Behavior and Reliability of Microjoints Within a Chip Stacking Architecture

[+] Author and Article Information
Jing-Yao Chang

Industrial Technology Research Institute,
No. 195, Sec. 4, Chung-Hsing Road,
Chutung, Hsinchu 31040, Taiwan;
Institute of Materials Science and Engineering,
National Taiwan University,
No. 1, Sec. 4, Roosevelt Road,
Taipei 10617, Taiwan

Shin-Yi Huang

Industrial Technology Research Institute,
No. 195, Sec. 4, Chung-Hsing Road,
Chutung, Hsinchu 31040, Taiwan

Chang-Chun Lee

Department of Mechanical Engineering,
Research Center for Microsystem Engineering,
Chung Yuan Christian University,
200, Chungpei Road,
Chungli, Taoyuan 32023, Taiwan

Tung-Han Chuang

Institute of Materials Science and Engineering,
National Taiwan University,
No. 1, Sec. 4, Roosevelt Road,
Taipei 10617, Taiwan

Tao-Chih Chang

Industrial Technology Research Institute,
No. 195, Sec. 4 , Chung-Hsing Road,
Chutung, Hsinchu 31040, Taiwan
e-mail: TaoChih@itri.org.tw

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received September 30, 2014; final manuscript received March 15, 2015; published online May 21, 2015. Assoc. Editor: Eric Wong.

J. Electron. Packag 137(3), 031007 (Sep 01, 2015) (8 pages) Paper No: EP-14-1083; doi: 10.1115/1.4030392 History: Received September 30, 2014; Revised March 15, 2015; Online May 21, 2015

In this study, the reliability performance of two capillary-type underfill materials with different glass transition temperatures (Tg) and coefficients of thermal expansion (CTE) were assessed for a chip stacking architecture. The microbumps for integrating four chips on a Si interposer were with a pitch size of 20 μm and composed of 5 μm Cu/3 μm Ni/5 μm Sn2.5Ag solder cap. A thermocompressive bonder was used to interconnect the microbumps at 280 °C for 15 s, and the microgaps between the chips and the interposer were then, respectively, sealed by the mentioned underfill materials to form a chip stacking architecture. Then, the reliability characteristics of the test vehicles were evaluated following the preconditioning and temperature cycling test (TCT). Furthermore, a numerical analysis model was established by ansys software to study the stress and strain contours of the microjoints sealed by different underfill materials. It was found that the lifetime of microjoints was highly related to the Tg points of underfills, an interfacial fracture was observed within the microjoints sealed by a lower Tg underfill after temperature cycling because the tensile strength damaged the Sn depletion zone as heated.

FIGURES IN THIS ARTICLE
<>
Copyright © 2015 by ASME
Your Session has timed out. Please sign back in to continue.

References

Banijamali, B., Ramalingam, S., Nagarajan, K., and Chaware, R., 2011, “Advanced Reliability Study of TSV Interposers and Interconnects for the 28nm Technology FPGA,” IEEE 61st Electronic Components Technology Conference (ECTC), Lake Buena Vista, FL, May 31–June 3, pp. 286–290. [CrossRef]
Li, Z., Shi, H., Xie, J., and Rahman, A., 2012, “Development of an Optimized Power Delivery System for 3D IC Integration With TSV Silicon Interposer,” IEEE 62nd Electronic Components Technology Conference (ECTC), San Diego, CA, May 29–June 1, pp. 678–682. [CrossRef]
Lau, J. H., 2014, “Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration,” ASME J. Electron. Packag., 136(4), p. 040801. [CrossRef]
Yu, A., Lau, J. H., Soon Wee, Ho., Kumar, A., Wai Yin, Hnin., Da-Quan, Yu., Ming Ching, Jong., Kripesh, V., Pinjala, D., and Dim-Lee, Kwong., 2009, “Study of 15 μm Pitch Solder Microbumps for 3D IC Integration,” 59th Electronic Components Technology Conference (ECTC 2009), San Diego, CA, May 26–29, pp. 6–10. [CrossRef]
Liu, D., and Park, S., 2014, “Three-Dimensional and 2.5 Dimensional Interconnection Technology: State of the Art,” ASME J. Electron. Packag., 136(1), p. 014001. [CrossRef]
Chang, J. Y., Cheng, R. S., Kao, K. S., Chang, T. C., and Chuang, T. H., 2012, “Reliable Microjoints Formed by Solid–Liquid Interdiffusion (SLID) Bonding Within a Chip Stacking Architecture,” IEEE Trans. Compon., Packag. Manuf., 2(6), pp. 979–984. [CrossRef]
Paunovic, M., Bailey, P. J., Schad, R. G., and, Smith, D. A., 1994, “Electrochemically Deposited Diffusion Barriers,” J. Electrochem. Soc., 141(7), pp. 1843–1850. [CrossRef]
Lee, B., Jeon, H., Kim, S., Kwon, K. W., Kim, J. W., and Lee, H. J., 2011, “Introduction of an Electroless-Plated Ni Diffusion Barrier in Cu/Sn/Cu Bonding Structures for 3D Integration,” J. Electrochem. Soc., 159(2), pp. H85–H89. [CrossRef]
Huang, S. Y., Chang, T.-C., Cheng, R.-S., Chang, J.-Y., Fan, C.-W., Zhan, C.-J., Lau, J. H., Chen, T.-H., Lo, W.-C., and Kao, M.-J., 2011, “Failure Mechanism of 20 μm Pitch Microjoint Within a Chip Stacking Architecture,” IEEE 61st Electronic Components Technology Conference (ECTC), Lake Buena Vista, FL, May 31–June 3, pp. 886–892. [CrossRef]
Huang, S. Y., Chang, T. C., Cheng, R. S., Chang, J. Y., Leu, F. J., Lu, Y. L., and Yang, T. F., 2010, “Reliability Assessment of the 20 μm Pitch Microjoints Within a 3DIC Assembly Under Various Environments,” 5th International Microsystems Packaging Assembly and Circuits Technology Conference (IMPACT), Taipei, Oct. 20–22. [CrossRef]
Yole Dévelopment, 2010, “Interview With Dr. William Chen of ASE,” 3D Packaging Magazine on 3D-IC, TSV, WLP, and Embedded Technologies, 17(Nov.), pp. 10–12.
JEDEC, 2003, “Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Test,” JEDEC Solid State Technology Association, Arlington, VA, Standard No. JESD22-A113D.
JEDEC, 2000, “Temperature Cycling,” JEDEC Solid State Technology Association, Arlington, VA, Standard No. JESD22-A104-B.
Ashraf Khan, M., Zheng, Q., Kopp, D., Buckhanan, W., Kulick, J. M., Fay, P., Kriman, A. M., and Bernstein, G. H., 2015, “Thermal Cycling Study of Quilt Packaging,” ASME J. Electron. Packag., 137(2), p. 021008. [CrossRef]
Wiese, S., and Rzepka, S., 2004, “Time-Independent Elastic–Plastic Behavior of Solder Materials,” Microelectron. Reliab., 44(12), 1893–1900. [CrossRef]
Iannuzzelli, R., 1991, “Predicting Plated-Through-Hole Reliability in High Temperature Manufacturing Processes,” 41st Electronic Components and Technology Conference (ECTC), Atlanta, May 11–16, pp. 410–421. [CrossRef]
Lee, C. C., and Lin, P. T., 2014, “Reliability-Based Design Guidance of Three-Dimensional Integrated Circuits Packaging Using Thermal Compression Bonding and Dummy Cu/Ni/SnAg Microbumps,” ASME J. Electron. Packag., 136(3), p. 031006. [CrossRef]
Lee, C. C., Yang, T. F., Wu, C. S., Kao, K. S., Cheng, R. C., and Chen, T. H., 2013, “Reliability Estimation and Failure Mode Prediction for 3D Chip Stacking Package With the Application of Wafer-Level Underfill,” Microelectron. Eng., 107, pp. 107–113. [CrossRef]
Lee, C. C., Chang, K. C., and Yang, Y. W., 2009, “Lead-Free Solder Joint Reliability Estimation of Flip Chip Package Using FEM-Based Sensitivity Analysis,” Solder. Surf. Mount Technol., 21(1), pp. 31–41. [CrossRef]
Lee, C. C., Liu, H. C., and Chiang, K. N., 2007, “3D Structure Design and Reliability Analysis of Wafer Level Package With Stress Buffer Mechanism,” IEEE Trans. Compon. Packag. Technol., 30(1), pp. 110–118. [CrossRef]
Yuan, C. A., Han, C. N., Yew, M. C., Chou, C. Y., and Chiang, K. N., 2005, “Design, Analysis and Development of Novel Three-Dimensional Stacking WLCSP,” IEEE Trans. Adv. Packag., 28(3), pp. 387–396. [CrossRef]
Lin, J. C., Cheng, H. C., and Chiang, K. N., 2005, “Design and Analysis of Wafer-Level CSP With Double Pad Structure,” IEEE Trans. Compon. Packag. Technol., 28(1), pp. 117–126. [CrossRef]
Wang, T. H., Lai, Y. S., and Wu, J. D., 2004, “Effect of Underfill Thermomechanical Properties on Thermal Cycling Fatigue Reliability of Flip Chip Ball Grid Array,” ASME J. Electron. Packag., 126(4), pp. 560–564. [CrossRef]
Cheng, R. S., Chang, H. J., Chang, T. C., and Chou, J. H., 2012, “Early Failure Induced by Phase Transformation in Microjoints for Chip-Level Integration,” Electrochem. Solid-State Lett., 15(3), pp. H75–H77. [CrossRef]
Lau, J. H., 2011, Reliability of RoHS Compliant 2D & 3D IC Interconnects, McGraw-Hill, New York.
Zhan, C. J., Chuang, C.-C., Juang, J.-Y., Lu, S.-T., and Chang, T.-C., 2010, “Assembly and Reliability Characterization of 3D Chip Stacking With 30 μm Pitch Lead-Free Solder Micro Bump Interconnection,” 60th Electronic Component Technology Conference (ECTC), Las Vegas, June 1–4, pp. 1043–1049. [CrossRef]
Zhang, Z., Park, S. B., Darhba, K., and Master, R. N., 2010, “Effect of Glass Transition Slope of Underfill on Solder Joint Fatigue Life,” 11th International Conference on Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), Xi'an, China, Aug. 16–19, pp. 350–355. [CrossRef]
Lin, C., Suhling, J. C., and Lall, P., 2009, “Isothermal Aging Induced Evolution of the Material Behavior of Underfill Encapsulants,” 59th Electronic Components Technology Conference (ECTC 2009), San Diego, May 26–29, pp. 134–149. [CrossRef]
Chang, J.-Y., Huang, S. Y., Cheng, R. S., Leu, F. J., Zhan, C. J., and Chang, T. C., 2010, “High Throughput Chip on Wafer Assembly Technology and Metallurgical Reactions of Pb-Free Micro-Joints Within a 3DIC Package,” International Conference of Electronic Packaging (ICEP2010), Sapporo, Japan, May 12–14, pp. 159–164.
Lloyd, J. R., Connelly, N. A., He, X., Ryan, K. J., and Wood, B. H., 2010, “Fast Diffusers in a Thermal Gradient (Solder Ball),” Microelectron. Reliab., 50(9–11), pp. 1355–1358. [CrossRef]
Spivak, A., 1974, “Gravity Segregation in Two-Phase Displacement Processes,” SPE J., 14(6), pp. 619–632. [CrossRef]
Shabestari, S. G., and Gruzleski, J. E., 1995, “Gravity Segregation of Complex Intermetallic Compounds in Liquid Al–Si Alloys,” Metall. Mater. Trans. A, 26(4), pp. 999–1006. [CrossRef]
Shen, J., Chan, Y. C., and Liu, S. Y., 2009, “Growth Mechanism of Ni3Sn4 in a Sn/Ni Liquid/Solid Interfacial Reaction,” Acta Mater., 57(17), pp. 5196–5206. [CrossRef]
Yang, R. W., Chang, Y. W., Sung, W. C., and Chen, C., 2012, “Precipitation of Large Ag3Sn Intermetallic Compounds in Sn2.5Ag Microbumps After Multiple Reflows in 3DIC Packaging,” Mater. Chem. Phys., 134(1), pp. 340–344. [CrossRef]
Hsu, H. H., Huang, S. Y., Chang, T. C., and Wu, A. T., 2011, “Nucleation and Propagation of Voids in Microbumps for 3 Dimensional Integrated Circuits,” Appl. Phys. Lett., 99(25), p. 251913. [CrossRef]

Figures

Grahic Jump Location
Fig. 1

Nonlinear and temperature-dependent stress and strain curve of Sn2.5Ag microbump [17]

Grahic Jump Location
Fig. 2

3D quarter simulation model and boundary conditions established in this work

Grahic Jump Location
Fig. 3

Geometry of the microjoints

Grahic Jump Location
Fig. 4

Distribution of equivalent plastic strain in the outer microjoints for comparison of underfill A (left) and underfill B (right)

Grahic Jump Location
Fig. 5

Equivalent plastic strain accumulation of the outermost microjoint for a comparison of underfill A and underfill B

Grahic Jump Location
Fig. 6

Scanning acoustic microscope (SAM) images of the microgaps sealed by underfill A: (a) before reliability test and (b) after reliability test

Grahic Jump Location
Fig. 7

SAM images of the microgaps sealed by underfill B: (a) before reliability test and (b) after reliability test

Grahic Jump Location
Fig. 8

Failed rate of samples as experienced temperature cycling

Grahic Jump Location
Fig. 9

Weibull distribution of the microjoints sealed by two different underfill materials under TCT test

Grahic Jump Location
Fig. 13

Elemental mapping analyses of Sn and Ni in a microjoint experienced reliability test

Grahic Jump Location
Fig. 12

SEM morphology of the as-bonded microjoint

Grahic Jump Location
Fig. 11

Cross-sectional image of the failed sample sealed by underfill B after 3000 temperature cycles

Grahic Jump Location
Fig. 10

Cross-sectional image of the survival microjoint sealed by underfill B after 3000 temperature cycles

Tables

Errata

Discussions

Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In