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Research Papers

Transient Characterization of Hybrid Microfluidic-Thermoelectric Cooling Scheme for Dynamic Thermal Management of Microprocessor

[+] Author and Article Information
Vivek Sahu, Andrei G. Fedorov

George W. Woodruff
School of Mechanical Engineering,
Georgia Institute of Technology,
Atlanta, GA 30332

Yogendra K. Joshi

George W. Woodruff
School of Mechanical Engineering,
Georgia Institute of Technology,
Atlanta, GA 30332
e-mail: yogendra.joshi@me.gatech.edu

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received September 16, 2013; final manuscript received June 17, 2014; published online July 15, 2014. Assoc. Editor: Mehmet Arik.

J. Electron. Packag 136(3), 031014 (Jul 15, 2014) (8 pages) Paper No: EP-13-1105; doi: 10.1115/1.4027901 History: Received September 16, 2013; Revised June 17, 2014

Power dissipated by modern microprocessors is a function of time and continuously changes with the workload, giving rise to temporal hotspots of local areas with very high power dissipation. A hybrid cooling scheme has been proposed, which combines solid-state cooling to remove the dynamically changing hotspots in real time while addressing the steady-state background power dissipation using liquid cooling in embedded microchannels. In this paper, we have investigated the transient behavior of the hybrid scheme through experiments as well as computational modeling. Infrared microscopy, equipped with transient detector, was used to study the transient cooling behavior when a power spike is produced by a microfabricated heater, emulating a hot spot. The results indicate that solid-state superlattice cooling (SLC) offers an extremely fast transient response, having time constant of the order of few tens of microseconds which matches with dynamics of microprocessor power dissipation. The effect of various geometric and operating conditions on the transient behavior of the hybrid scheme has been assessed to provide an insight and guidelines for optimal design and operation of the proposed hybrid cooling scheme.

Copyright © 2014 by ASME
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Figures

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Fig. 1

Schematic diagram of the chip-level hybrid cooling scheme combining microfluidic and solid-state thermoelectric cooling using fabricated using CMOS compatible techniques

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Fig. 2

Schematic of the microfabricated test module showing key components of the test structure. SLC refers to the superlattice cooler.

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Fig. 3

Photograph showing a bottom view of the test device. Superlattice coolers along with hotspot heaters, mimicking the hotspots, are fabricated as five clusters at representative locations on the die surface (center, edge, and three corners). Each SLC has a dedicated ground electrode.

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Fig. 4

Magnified image of superlattice coolers and hotspot heaters (one of the clusters shown in Fig. 3, ground electrodes are not shown in the image). Serpentine lines represent the hotspot heaters. Each hotspot heater has a superlattice cooler underneath it. Superlattice coolers are separated from the hotspot heaters by a 300 nm silicon nitride electric insulation layer. Three different hotspot heaters and are shown with dimensions of 70 μm × 70 μm, 100 μm × 100 μm, and 120 μm × 120 μm.

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Fig. 5

Emissivity map of the sample coated with a thin layer of graphite foam, as used for measurement calibration by IR microscope

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Fig. 6

Electrical circuit used to simultaneously trigger the SLC and IR microscope

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Fig. 7

Electrical circuit used to simultaneously trigger the hotspot, SLC, and IR microscope. The two signal generator units are synchronized via phase lock-in.

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Fig. 8

Transient cooling response of the 100 μm × 100 μm superlattice cooler with the hotspot heater in the off state. Red curve shows the square trigger pulse which activates superlattice cooler as well as the IR microscope used for temperature measurement. Superlattice cooler is activated when trigger voltage is nonzero and vice versa. SLC is activated at t = 0 s.

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Fig. 9

Transient cooling response time of the SLC for different SLC activation currents. Superlattice cooler dimensions are 100 μm × 100 μm. SLC is activated at t = 0 s. Hotspot heater is not activated.

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Fig. 10

Transient cooling response of the SLC for different SLC sizes. Superlattice cooler activation current is 100 mA. SLC is activated at t = 0 s. Hotspot heater is not activated.

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Fig. 11

Effect of activation delay between SLC and hotspot. Superlattice cooler and hotspot heater both are 100 μm × 100 μm across. Hotspot heater is activated at t = 0 s and SLC is activated at predefined delay.

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Fig. 12

Comparison of charge migration and relaxation time scales to the characteristic time of thermal diffusion transport

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Fig. 13

Schematic of the simulation geometry

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Fig. 14

Comparisons of the transient uptake upon SLC actuation obtained through computational modeling and experiments. SLC is activated at t = 0 s.

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Fig. 16

Effect of thermal coupling between superlattice coolers in transient domain. Both SLCs are 100 μm × 100 μm across, and activated at t = 0 s.

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Fig. 15

Effect of heat transfer coefficient applied at the bottom of the microchannel heat sink on the transient response of the superlattice cooler. SLC is 100 μm × 100 μm across, and activated at t = 0 s. The insert shows the transient response for t < 10 ms.

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