0
Research Papers

Thermal-Aware Microchannel Cooling of Multicore Processors: A Three-Stage Design Approach

[+] Author and Article Information
Yubai Li, Dongzhi Guo, Shi-Chune Yao

Carnegie Mellon University,
5000 Forbes Avenue,
Pittsburgh, PA 15213

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received June 25, 2013; final manuscript received February 17, 2014; published online April 29, 2014. Assoc. Editor: Gongnan Xie.

J. Electron. Packag 136(2), 021002 (Apr 29, 2014) (10 pages) Paper No: EP-13-1053; doi: 10.1115/1.4027174 History: Received June 25, 2013; Revised February 17, 2014

This study goes beyond the common microchannel cooling system composed of uniform parallel straight microchannels and proposed a three-stage design approach for spatially thermal-aware microchannel cooling of 2D multicore processors. By applying effective strategies and arranging key design parameters, stronger cooling is provided under the high power core area, and less cooling is provided under the low power cache area to effectively save the precious pumping power, lower the hot spot temperature and lower temperature gradients on chip. Two microchannel cooling systems are specifically designed for a 2 core 150 W Intel Tulsa processor and an 8 core 260 W (doubled power) Intel Nehalem processor with single phase HFE7100 as coolant. For the Tulsa processor, a strategy named strip-and-zone is used. The final design leads to 30 kPa pressure drop and 0.094 W pumping power while maintains the hot spot temperature to be 75 °C. For the Nehalem processor, a split flow microchannel system and a widen-inflow strategy are applied. A design is achieved to cost 15 kPa pressure drop and 0.0845 W pumping power while maintains the hot spot temperature to be 82.9°C. The design approach in this study provides the basic guide for the industrial applications of effective multicore processor cooling using microchannels.

FIGURES IN THIS ARTICLE
<>
Copyright © 2014 by ASME
Your Session has timed out. Please sign back in to continue.

References

Figures

Grahic Jump Location
Fig. 1

Scheme of microchannel cooling of multicore processor

Grahic Jump Location
Fig. 2

Scheme of a split flow microchannel cooling system

Grahic Jump Location
Fig. 3

Various Nusselt number distributions for the porous media thermal modeling

Grahic Jump Location
Fig. 4

Comparison of various porous media thermal modeling results with 3D conjugate modeling

Grahic Jump Location
Fig. 5

Floorplan of multicore processors and shemes of corresponding microchannel cooling systems: (a) and (b) Intel Tulsa processor (2 Core), (c) and (d) Intel Itanium processor (4 Core), (e) and (f) Intel Nehalem processor (8 Core)

Grahic Jump Location
Fig. 6

Heat flux map and different microchannel cooling systems for Tulsa processor: (a) heat flux distribution of Tulsa processor; (b) two-zone system; (c) three-strip system; and (d) strip-and-zone system

Grahic Jump Location
Fig. 7

Heat flux map and different microchannel cooling systems for Nehalem processor: (a) heat flux distribution of Nehalem processor; (b) narrow-inflow channel system; and (c) widen-inflow channel system

Grahic Jump Location
Fig. 8

Illustration of simulation zone for the Tulsa processor

Grahic Jump Location
Fig. 9

Temperature field of heater surface and fluid flow for Tulsa processor with straight microchannel cooling system

Grahic Jump Location
Fig. 10

Temperature field of heater surface and fluid flow for Tulsa processor with different cooling systems of (a) two-zone, (b) three-strip, (c) strip-and-zone, and (d) strip-and-zone with parameters adjusted

Grahic Jump Location
Fig. 11

Illustration of simulation zone for the Nehalem processor

Grahic Jump Location
Fig. 12

Temperature field of heater surface and fluid flow for Nehalem processor with different cooling systems: (a) narrow-inflow channel and (b) widen-inflow channel

Grahic Jump Location
Fig. 13

Numerical results in the optimization stage for microchannel cooling system of Nehalem processor

Grahic Jump Location
Fig. 14

Darcy velocity distribution for W2 = 1000 μm, δ = 100 μm microchannel cooling system of Nehalem processor

Tables

Errata

Discussions

Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In