Research Papers

A New Accurate Closed-Form Analytical Solution for Junction Temperature of High-Powered Devices

[+] Author and Article Information
J. H. L. Ling

Department of Mechanical Engineering,
National University of Singapore,
Singapore 117575
e-mail: g0900551@nus.edu.sg

A. A. O. Tay

Department of Mechanical Engineering,
National University of Singapore,
Singapore 117575
e-mail: mpetayao@nus.edu.sg

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received July 21, 2013; final manuscript received December 1, 2013; published online January 16, 2014. Assoc. Editor: Amy Fleischer.

J. Electron. Packag 136(1), 011007 (Jan 16, 2014) (7 pages) Paper No: EP-13-1072; doi: 10.1115/1.4026352 History: Received July 21, 2013; Revised December 01, 2013

The peak junction temperature has a profound effect on the operational lifetime and performance of high powered microwave devices. Although numerical analysis can help to estimate the peak junction temperature, it can be computationally expensive and time consuming when investigating the effect of the device geometry and material properties on the performance of the device. On the other hand, a closed-form analytical method will allow similar studies to be done easily and quickly. Although some previous analytical solutions have been proposed, the solutions either require over-long computational times or are not so accurate. In this paper, an accurate closed-form analytical solution for the junction temperature of power amplifier field effect transistors (FETs) or monolithic microwave integrated circuits (MMICs) is presented. Its derivation is based on the Green's function integral method on a point heat source developed through the method of images. Unlike most previous works, the location of the heat dissipation region is assumed to be embedded under the gate. Since it is a closed-form solution, the junction temperature as well as the temperature distribution around the gate can be easily calculated. Consequently, the effect of various design parameters and material properties affecting the junction temperature of the device can be easily investigated. This work is also applicable to multifinger devices by employing superposition techniques and has been shown to agree well with both numerical and experimental results.

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Grahic Jump Location
Fig. 3

Line heat source of finite length l embedded at a depth a in a semi-infinite solid

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Fig. 2

Substrate subjected to an embedded localised constant heat source of finite length Wg, and a base at a constant temperature. The remaining surfaces are assumed adiabatic

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Fig. 1

(a) Top view and (b) schematic cross-sectional view of a multigate MMIC device

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Fig. 8

Comparison of substrate surface temperature distribution calculated using the present work with Ditri [7], Darwish et al. [21], and FEA results

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Fig. 7

Mesh details around the volumetric heat source (quarter model)

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Fig. 4

Mirror image of heat source reflected about yz plane to obtain adiabatic boundary condition at the top surface

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Fig. 9

Comparison between present work and FEA at power input of 1 W/mm and 1.5 W/mm with To = 55 °C for gate pitch of (a) 24 μm and (b) 36 μm

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Fig. 10

Comparison between calculated and measured gate temperature rise for the 4 × 50 μm, 0.25 μm gate length GaAs FET device

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Fig. 11

Adiabatic boundary condition at lateral faces can be formed by carrying out method of images in both directions. Only one row of images (grey) is shown in this figure

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Fig. 12

(a) Percentage difference in the calculated temperature profile at power dissipation of 1 W/mm and 1.5 W/mm by considering with and without one row of image sources at lateral face for gate pitch of 24 μm. (b) Converging rate for the maximum gate temperature for gate pitch of 24 μm at power dissipation of 1 W/mm




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