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Journal of Electronic Packaging | Volume 135 | Issue 1 | research-article
Research Papers

Development of a Fused Deposition Modeling System for Low Melting Temperature Metal Alloys

[+] Author and Article Information
Jorge Mireles

W.M. Keck Center for 3D Innovation,
The University of Texas at El Paso,
El Paso, TX 79902
e-mail: jmireles3@miners.utep.edu

Ho-Chan Kim

Department of Mechanical and
Automotive Engineering,
Andong National University,
Andong, Geyongbuk,
760-759, South Korea
e-mail: hckim@andong.ac.kr

In Hwan Lee

School of Mechanical Engineering,
Chungbuk National University,
Cheongju, Chungbuk,
361-763, South Korea
e-mail: hl1anxoo@gmail.com

David Espalin

e-mail: despalin@miners.utep.edu

Francisco Medina

e-mail: frmedina@utep.edu

Eric MacDonald

e-mail: emac@utep.edu

Ryan Wicker

e-mail: rwicker@utep.edu
W.M. Keck Center for 3D Innovation,
The University of Texas at El Paso,
El Paso, TX

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the Journal of Electronic Packaging. Manuscript received February 28, 2012; final manuscript received June 22, 2012; published online February 26, 2013. Assoc. Editor: Kyoung-sik (Jack) Moon.

J. Electron. Packag 135(1), 011008 (Feb 26, 2013) (6 pages) Paper No: EP-12-1034; doi: 10.1115/1.4007160 History: Received February 28, 2012; Revised June 22, 2012
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This research focused on extending the applications of fused deposition modeling (FDM) by extrusion and deposition of low melting temperature metal alloys to create three-dimensional metal structures and single-layer contacts which may prove useful for electronic interconnects. Six commercially available low melting temperature solder alloys (Bi36Pb32Sn31Ag1, Bi58Sn42, Sn63Pb37, Sn50Pb50, Sn60Bi40, Sn96.5Ag3.5) were tested for the creation of a fused deposition modeling for metals (FDMm) system with special attention given to Sn–Bi solders. An existing FDM 3000 was used and two alloys were successfully extruded through the system's extrusion head. Deposition was achieved through specific modifications to system toolpath commands and a comparison of solders with eutectic and non-eutectic compositions is discussed. The modifications demonstrate the ability to extrude simple single-layer solder lines with varying thicknesses, including sharp 90 deg angles and smooth curved lines and showing the possibility of using this system for printed circuit board applications in which various connections need to be processed. Deposition parameters altered for extrusion and the deposition results of low melting temperature metal alloys are introduced.
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Figures

Grahic Jump Location
Fig. 1

Schematic of liquefier used for FDM

+Schematic of liquefier used for FDM
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Schematic of liquefier used for FDM
Grahic Jump Location
Fig. 2

Execution of main ACL commands

+Execution of main ACL commands
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Execution of main ACL commands
Grahic Jump Location
Fig. 3

Two-dimensional deposition (a) fused deposition of non-eutectic Sn–Bi solder lines, (b) design of circuit pattern, (c) fused deposition of non-eutectic Sn–Bi circuit pattern, (d) pattern built using eutectic Sn–Bi, and (e) pattern built using non-eutectic Sn–Bi

+Two-dimensional deposition (a) fused deposition of non-eutectic Sn–Bi solder lines, (b) design of circuit pattern, (c) fused deposition of non-eutectic Sn–Bi circuit pattern, (d) pattern built using eutectic Sn–Bi, and (e) pattern built using non-eutectic Sn–Bi
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Two-dimensional deposition (a) fused deposition of non-eutectic Sn–Bi solder lines, (b) design of circuit pattern, (c) fused deposition of non-eutectic Sn–Bi circuit pattern, (d) pattern built using eutectic Sn–Bi, and (e) pattern built using non-eutectic Sn–Bi
Grahic Jump Location
Fig. 4

Multilayer deposition of Sn–Bi (a) multilayer line and (b) 360× optical image of stacked layers that were polished and etched (interface is highlighted with arrows)

+Multilayer deposition of Sn–Bi (a) multilayer line and (b) 360× optical image of stacked layers that were polished and etched (interface is highlighted with arrows)
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Multilayer deposition of Sn–Bi (a) multilayer line and (b) 360× optical image of stacked layers that were polished and etched (interface is highlighted with arrows)
Grahic Jump Location
Fig. 5

Deposition of Sn–Bi via FDMm into 3D vias

+Deposition of Sn–Bi via FDMm into 3D vias
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Deposition of Sn–Bi via FDMm into 3D vias

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