0
Research Papers

Reliability Assessment of Preloaded Solder Joint Under Thermal Cycling

[+] Author and Article Information
Seungbae Park

Department of Mechanical Engineering,
State University of New York at Binghamton,
P.O. Box 6000, Binghamton, NY 13902

1Corresponding author.

Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the Journal of Electronic Packaging. Manuscript received June 12, 2012; final manuscript received September 5, 2012; published online November 16, 2012. Assoc. Editor: Bongtae Han.

J. Electron. Packag 134(4), 041008 (Nov 16, 2012) (6 pages) doi:10.1115/1.4007674 History: Received June 12, 2012; Revised September 05, 2012

The ever increasing power density in modern semiconductor devices requires heat dissipation solution such as heat sink to remove heat away from the device. A compressive loading is usually applied to reduce the interfacial thermal resistance between package and heat sink. In this paper, both experimental approaches and numerical modeling were employed to study the effect of compressive loading on the interconnect reliability under thermal cycling conditions. A special loading fixture which simulated the heat sink was designed to apply compressive loading to the package. The JEDEC standard thermal cycle tests were performed and the resistance of daisy chained circuits was in situ measured. The time to crack initiation and time to permanent failure were identified separately based on in situ resistance measurement results. Failure analysis has been performed to identify the failure modes of solder joint with and without the presence of compressive loading. A finite element based thermal-fatigue life prediction model for SAC305 solder joint under compressive loading was also developed to understand the thermal-fatigue crack behaviors of solder joint and successfully validated with the experimental results.

FIGURES IN THIS ARTICLE
<>
Copyright © 2012 by ASME
Your Session has timed out. Please sign back in to continue.

References

Yu, D., Kwak, J. B., and Park, S. B., 2010, “Dynamic Responses of PCB Under Product-Level Free Drop Impact,” Microelectron. Reliab., 50, pp. 1028–1038. [CrossRef]
Yu, D., Kwak, J. B., and Park, S. B., 2009, “Effect of Shield-Can Design on Dynamic Responses of PCB Under Board Level Drop Impact,” Proceedings of ASME-IMECE 2009, ASME Paper No. IMECE2009-12639, pp. 305–310. [CrossRef]
Yu, D., Kwak, J. B., Park, S. B., Chung, S., and Yoon, J.-Y., 2012, “Effect of Shield-Can on Dynamic Response of Board-Level Assembly,” J. Electron. Packag., 134(3), p. 031010. [CrossRef]
Yu, D., Abdullah, A.-Y., TungT. N., Seungbae, P., and Soonwan, C., 2011, “High-Cycle Fatigue Life Prediction of Lead-Free Solder Joints Under Random Vibration Loading,” Microelectron. Reliab., 51, pp. 649–656. [CrossRef]
Yu, D., Abdullah, A.-Y., Park, S. B., and Chung, S., “Finite Element Based Fatigue Life Prediction for Electronic Components Under Random Vibration Loading,” Proceedings of the 60th Electronic Components and Technology Conference, Las Vegas, NV, June 1–4, pp. 188–193. [CrossRef]
Dishongh, T., Basran, C., Cartwrght, A. N., Ying, Z., and Heng, L., 2002, “Impact of Temperature Cycle Profile on Fatigue Life of Solder Joints,” IEEE Trans. Adv. Packag., 25(3), pp. 433–438. [CrossRef]
Vandevelde, B., Gonzalez, M., Limaye, P., Ratchev, P., and Beyne, E., 2007, “Thermal Cycling Reliability of SnAgCu and SnPb Solder Joints: A Comparison for Several IC-Packages,” Microelectron. Reliab., 47, pp. 259–265. [CrossRef]
Kwak, J. B., Yu, D., Nguyen, T. T., and Park, S., 2011, “Solder Joint Reliability in Underfilled Flip Chip Package With a Consideration of Chip-Package-Interaction (CPI),” Proceedings of ASME-InterPACK 2011, Portland, OR, July 6–8, ASME Paper No. IPACK2011-52233, pp. 307–316. [CrossRef]
Yu, D., Nguyen, T., Lee, H. H., Goo, N., and Park, S. B., 2011, “Effect of Compressive Loading on the Interconnect Reliability Under Thermal Cycling,” Proceedings of ASME-InterPACK 2011, Portland, OR, July 6–8, ASME Paper No. IPACK2011-52232, pp. 603–608. [CrossRef]
Chiu, T., Edwards, D., and Ahmad, M., 2010, “Ball Grid Array Solder Joint Reliability Under System Level Compressive Load,” IEEE Trans. Device Mater. Reliab., 10(3). pp. 324–337. [CrossRef]
Chiu, T. C., Lin, J.-J., Yang, H.-C., and Gupta, V., 2010, “Reliability Model for Bridging Failure of Pb-Free Ball Grid Array Solder Joints Under Compressive Load,” Microelectron. Reliab., 50, pp. 2037–2050. [CrossRef]
Zhang, R., “Characterization of Board Level Reliability of a System With Flip Chip HITCE BGA Package Through Modeling and Testing,” 58th Electronic Components and Technology Conference, Lake Buena Vista, FL, May 27–30, pp. 1438–1444. [CrossRef]
Bhatti, P. K., Pei, M., and Fan, X., “Reliability Analysis of SnPb and SnAgCu Solder Joints in FC-BGA Packages With Thermal Enabling Preload,” 56th Electronic Components and Technology Conference, San Diego, CA, May 30–June 2, pp. 601–606. [CrossRef]
Garner, L., Zhang, C., Beh, K. S., Helms, K., and Tan, Y. L., 2004, “Effect of Compression Loads on the Solder Joint Reliability of Flip Chip BGA Packages,” 54th Electronic Components and Technology Conference, Las Vegas, NV, June 1–4, pp. 692–698. [CrossRef]
JEDEC Solid State Technology Association, 2005, Temperature Cycling, JESD22-A104C, JEDEC Solid State Technology Association, Arlington, VA.
IPC, 2002, Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments, IPC 9701, IPC–Association Connecting Electronics Industries, Bannockburn, IL.
Eyman, L. M., and Kromann, G. B., 1997, “Investigation of Heat Sink Attach Methodologies and the Effects on Package Structural Integrity and Interconnect Reliability of the 119-Lead Plastic Ball Grid Array,” Proceedings of the 47th Electronic Components and Technology Conference, San Jose, CA, May 18–21, pp. 1068–1075. [CrossRef]

Figures

Grahic Jump Location
Fig. 1

Test vehicle with four 92BGA packages attached and daisy chained circuits of 92BGA

Grahic Jump Location
Fig. 2

Compressive load fixture

Grahic Jump Location
Fig. 3

Thermal chamber setup with air stream flowing from upper right corner to upper left corner

Grahic Jump Location
Fig. 4

Temperature cycling profiles of all test boards

Grahic Jump Location
Fig. 5

A typical resistance measurement result of the whole test period

Grahic Jump Location
Fig. 6

(a) Lognormal distribution of time to crack initiation and (b) lognormal distribution of time to permanent failure

Grahic Jump Location
Fig. 7

(a) Crack propagated through the IMC layer (mode 1) (b) crack propagated through Cu pad/solder interface (mode 2)

Grahic Jump Location
Fig. 8

Two failure modes of failed packages with the presence of compressive load

Grahic Jump Location
Fig. 9

Finite element model of the test assembly

Grahic Jump Location
Fig. 10

Von Mises stress contour plot of the corner solder joint under compressive loading

Grahic Jump Location
Fig. 11

Accumulated plastic work per cycle

Grahic Jump Location
Fig. 12

Solder joint plastic work distribution

Tables

Errata

Discussions

Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In