Research Papers

Influences of Solder Wetting on Self-Alignment Accuracy and Modeling for Optoelectronic Devices Assembly

[+] Author and Article Information
Ming Kong

 Department of Mechanical Engineering, University of Colorado, Boulder, CO 80309-0427ming.kong@colorado.edu

Sungeun Jeon

 Moog-CSA Engineering, Albuquerque, NM 87123-3853chamnit@gmail.com

Chiwon Hwang

 Components Research, Intel Corporation, Chandler, AZ 85226hwangcw12@gmail.com

Y. C. Lee

 Department of Mechanical Engineering, University of Colorado, Boulder, CO 80309-0427leeyc@colorado.edu

J. Electron. Packag 134(2), 021002 (Jun 11, 2012) (10 pages) doi:10.1115/1.4006513 History: Received March 31, 2011; Revised March 12, 2012; Published June 11, 2012; Online June 11, 2012

Solder self-alignment is an important phenomenon enabling cost-effective optoelectronics assembly. In this study, the wetting of Sn-rich solder to under bump metallization (UBM) pads is identified as a critical factor affecting self-alignment accuracy. Incomplete wetting of solder to the metallization pads is responsible for chip-to-substrate misalignment larger than 1 μm, while fabrication tolerances, such as solder volume variation and pad diameter deviation, only account for misalignments in the submicron range. To quantitatively investigate the effect of incomplete wetting on self-alignment accuracy, a three-dimensional (3D) model based on a force optimization method was developed. With the input parameters of incomplete solder metallurgical wetting area, position and diameter of metallization pad, volume of individual solder bumps, coefficient of solder surface tension, mass of the chip, external forces acting on the chip, and initial pick-and-place position of the chip before assembly, the model predicts the assembled position of the chip in terms of the misalignments in the X-Y plane and the rotation angle along the Z axis. The model further confirmed that incomplete wetting of solder is the most critical modulator among the undesirable factors affecting solder self-alignment accuracy.

Copyright © 2012 by American Society of Mechanical Engineers
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Figure 1

Schematics of solder self-aligning motion. Misaligned chip and substrate are realigned spontaneously by solder connection during high-temperature reflow as the molten joint minimizes its surface energy.

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Figure 12

Diagram showing alignment offsets of the soldering pads after chip’s upside-down flip over. The dashed circles represent the initial designed positions of the solder pads, and the solid circles represent the adjusted positions of these pads as a result of incomplete wetting, with shift vector indexes denoting their respective adjustments.

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Figure 13

Comparison between (a) modeling and (b) experimental results for an incomplete wetting case

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Figure 14

(a) A hypothetical layout design of bonding pads and their individual incomplete wetting conditions (the pad pitch was reduced to 400 μm and the other parameters were kept the same). (b) Simulation results for the above design. The chip’s misalign_x and misalign_y remained the same while the rotation angle increased to 0.38 deg.

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Figure 15

Comparison between (a) modeling and (b) experimental results for a complete wetting case. Due to limitations in measurement resolution, the simulation results predict much smaller misalignment than experiment observation. Both results showed that precise alignment with accuracy less than 1 μm can be achieved in an assembly with good wetting.

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Figure 2

Photograph of the chip on substrate test vehicles. The five transparent squares (3 x 3 mm) on the top are dummy glass chips, and the dark one beneath is the silicon substrate. Solder connections are between the chips and the substrate.

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Figure 3

Layout of under bump metallization pads and the alignment marks. The images on the bottom are optical microscopic photographs of the alignment marks from a real assembly. The bright contrast (copper) marks are located on the silicon substrate, and the dark contrast (titanium) marks are on the glass chip. By measuring the magnitude of the alignment mark set’s overlap, glass chip’s position relative to the substrate can be determined.

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Figure 4

Diagram of a misaligned chip-to-substrate system. (x1 , y1 ) and (x2 , y2 ) are Cartesian coordinates of two individual pads located on the substrate. (x1 ′, y1 ′), (x2 ′, y2 ′) are the coordinates of the pads on the chip opposite to the above two pads. The overall misalignments of the chip relative to the substrate, defined as misalignment in X direction, misalign_x, misalignment in Y direction, misalign_y, and rotation angle at the center point of the chip, θ, can be calculated through inputting the known parameters (x1 , y1 ), (x2 , y2 ), and (x1 ′, y1 ′), (x2 ′, y2 ′) to Eq. 1.

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Figure 5

Diagram of the formic acid-based soldering apparatus. The sample to be assembled was placed on a hot plate, whose surface was leveled with a gradienter. Then, gas mixture of formic acid vapor and high purity nitrogen was guided into a glass chamber which covered the hot plate to create a reduction atmosphere.

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Figure 6

Optical microscope photographs of a test vehicle with precise alignment. For this sample, precise alignment was achieved with misalignments of 0.5 ± 0.5 μm in the x direction, − 0.5 ± 0.5 μm in the y direction, and no rotation at the chip center.

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Figure 7

Optical microscope photographs of a test vehicle with poor alignment. For this sample, poor chip-to-substrate alignment with misalignments of 8.2 ± 0.5 μm in the x direction, 10.8 ± 0.5 μm in the y direction, and 0.13 ± 0.01 deg of counter clockwise rotation at the chip center was observed.

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Figure 8

Optical microscope photographs of a disassembled test vehicle with incomplete wetting where: (a) residual copper was observed on several UBM pads located on the glass chip and (b) irregular shapes were found for solder bumps on the silicon substrate

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Figure 9

Optical microscope photographs of a disassembled test vehicle with complete wetting where: (a) no residual copper was observed on UBM pads located on the glass chip and (b) round shapes were found for solder bumps on the silicon substrate

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Figure 10

SEM images of solder bumps in assemblies with different wetting conditions showing: (a) an array of completely wetting solder bumps with perfect symmetry; (b) a representative perfect truncated bump; (c) an array of distorted solder bumps due to incomplete wetting; and (d) a representative defective bump

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Figure 11

Diagram showing methodology to identify incomplete wetting introduced alignment offsets by excluding residual copper from the original pads. The adjusted positions of the pads are outlined by white circles, while the inset on the top right corner shows the shift of the pad from the initial position to the adjusted position. The index (−50, 30) indicates a shift of −50 μm along the X-axis and 30 μm along the Y-axis from the pad.




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