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Research Papers

Interconnect Joule Heating under Transient Currents using the Transmission Line Matrix Method

[+] Author and Article Information
Banafsheh Barabadi, Satish Kumar

 G.W. Woodruff School of Mechanical Engineering,  Georgia Institute of Technology, Atlanta, GA, 30332

Yogendra K. Joshi1

 G.W. Woodruff School of Mechanical Engineering,  Georgia Institute of Technology, Atlanta, GA, 30332

Gamal Refai-Ahmed

 Advanced Micro Devices, Inc., Markham, ON, Canada, L3T-7X6

1

Corresponding author. Yogendra K. Joshi, Ph.D., G.W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, 801 Ferst Dr, Atlanta, GA, 30332.

J. Electron. Packag 134(1), 011009 (Mar 21, 2012) (7 pages) doi:10.1115/1.4006137 History: Received July 19, 2010; Revised December 02, 2011; Published March 21, 2012

The quality and reliability of interconnects in microelectronics is a major challenge considering the increasing level of integration and high current densities. This work studied the problem of transient Joule heating in interconnects in a two-dimensional (2D) inhomogeneous domain using the transmission line matrix (TLM) method. Computational efficiency of the TLM method and its ability to accept non-uniform 2D and 3D mesh and variable time step makes it a good candidate for multi-scale analysis of Joule heating in on-chip interconnects. The TLM method was implemented with link-resistor (LR) and link-line (LL) formulations, and the results were compared with a finite element (FE) model. The overall behavior of the TLM models were in good agreement with the FE model while, near the heat source, the transient TLM solutions developed slower than the FE solution. The steady-state results of the TLM and FE models were identical. The two TLM formulations yielded slightly different transient results, with the LL result growing slower, particularly at the source boundary and becoming unstable at short time-steps. It was concluded that the LR formulation is more accurate for transient thermal analysis.

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Copyright © 2012 by American Society of Mechanical Engineers
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References

Figures

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Figure 4

Temperature contours in the interconnect and dielectric (see Fig. 3) at 14 μs using (a) FE method and (b) LR TLM method

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Figure 5

Comparison of spatial variation of temperature along the x-axis at the upper edge (shown in the picture) by LR TLM (solid line) and FE (marked line) methods at different times

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Figure 6

Analysis of the time step dependency of temperature distribution along the x-axis at the upper edge for LR TLM using time steps of 0.1, 1, and 10 ns

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Figure 7

Comparison of spatial variation of temperature along the x-axis at the upper edge by LR TLM (solid line), LL TLM (dashed line), and FE results (marked line) at three different times

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Figure 8

Observation of the time step dependency of the temperature in LL TLM method along x-axis throughout the structure with time steps of (a) Δt = 1.95 ns and (b) Δt = 1.9 ns. (c) Schematic of structure with highlighted region where the instability grows when time step is less than 1.92 ns.

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Figure 1

Analogous electrical circuit for (a) link-line TLM (LL TLM) method and (c) link-resistor TLM (LR TLM) method. Electrical circuit representation of a single node of resistance-impedance network by (b) LL TLM and (d) LR TLM methods [11].

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Figure 2

Three adjacent nodes located at the center of transmission line and their pulses. Solid line arrows = incident pulse. Dashed and dotted line arrows = scattered pulse. Pulse notation for left superscript: s = scattered and i = incident. Pulse notation for left subscript: k = time step. Pulse notation for right subscript: pulse approaching the node from left (L) and from right (R).

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Figure 3

Schematic of the model consisting of a set of W = 180 nm wide interconnects that are evenly spaced and embedded in the dielectric. The mesh used in the FEA technique is shown. In this study: Hint  = Hd  = 2W and P = 4W.

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