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Research Papers

Influence of Power Cycling Durations on Thermal and Fatigue Reliability Characteristics of Board-Level Chip-Scale Packages

[+] Author and Article Information
Tong Hong Wang, Chang-Chi Lee, Kuo-Yuan Lee

Central Labs, Advanced Semiconductor Engineering, Inc., 26 Chin 3rd Road, Nantze Export Processing Zone, Kaohsiung 811, Taiwan

Yi-Shao Lai2

Central Labs, Advanced Semiconductor Engineering, Inc., 26 Chin 3rd Road, Nantze Export Processing Zone, Kaohsiung 811, Taiwanyishao_lai@aseglobal.com

2

Corresponding author.

J. Electron. Packag 131(1), 011001 (Feb 11, 2009) (5 pages) doi:10.1115/1.3068294 History: Received August 23, 2007; Revised April 15, 2008; Published February 11, 2009

The sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, was performed in this work to investigate thermal characteristics along with fatigue reliability of a thin-profile fine-pitch ball grid array chip-scale package subjected to power cycling. The numerical model was calibrated using steady-state and power cycling experiments. Following the calibrated numerical model, different power cycling durations on the thermal characteristics and fatigue reliability of the solder joints were examined. Numerical results indicate that, compared with thermal cycling, power cycling requires many more cycles to achieve a stabilized plasticity index between test cycles. The fatigue reliability would therefore be greatly underestimated if only such an index of the first several cycles is followed in the predictions.

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Copyright © 2009 by American Society of Mechanical Engineers
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Figures

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Figure 1

Eighth-symmetry finite element model

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Figure 2

Calibration experiment setup

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Figure 9

Temperature distributions under test conditions (a) P1 and (b) P3 at the end of power-on (left) and power-off (right) stages during the 15th test cycle (unit: K)

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Figure 8

Relative errors of ΔWave between test cycles

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Figure 7

ΔWave at different test cycles

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Figure 6

VSED contour for test condition P1 at the end of test cycles (unit: J/m3)

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Figure 5

Time histories of Tj and Tb for transient power cycling with a power of 1.1 W (consecutively power-on and off for 0.25 s, 1 s, and 5 s) and Ta at 21.2°C

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Figure 4

Time histories of Tj and Tb for transient power cycling with a power of 1.1 W (consecutively power-on for 10 s and power-off for 10 s) and Ta at 21.2°C

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Figure 3

Time histories of Tj and Tb under steady-state thermal dissipation with a power of 1.1 W and Ta at 19.3°C

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