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Research Papers

Wiresweep Reduction via Direct Cavity Injection During Encapsulation of Stacked Chip-Scale Packages

[+] Author and Article Information
Jason M. Brand

 Intel Corporation, 1900 Prairie City Road, M∕S FM3-40, Folsom, CA 95630

Salvatore A. Ruggero1

 Intel Corporation, 5000 W. Chandler Boulevard, Chandler, AZ 85226

Amip J. Shah2

 Hewlett Packard Laboratories, 1501 Page Mill Road, M∕S 1183, Palo Alto, CA 94304amip.shah@hp.com

Intel is a trademark or registered trademark of the Intel Corporation in the United States and other countries. Other names and brands may be claimed as the property of others.

1

Present address: Qualcomm, Inc.

2

Corresponding author.

J. Electron. Packag 130(1), 011011 (Feb 12, 2008) (6 pages) doi:10.1115/1.2837561 History: Received July 10, 2007; Revised August 15, 2007; Published February 12, 2008

As packaging continues to offer challenges with variable stacked die configurations of increasing complexity, traditional transfer mold encapsulation faces challenges in defining a robust process window. A major concern is the problem of “wiresweep,” wherein deformation of the wirebond during the mold process can potentially cause shortcircuiting. Several prior studies have focused on qualifying the effects of various wirebond and mold process parameters on package wiresweep, but most of these studies are restricted to single (discrete) die packages. This paper attempts to fill this gap of knowledge by experimenting with a variety of test vehicles with different stacking configurations. Specifically, the effects of varying loop height, stack height, and mold compound type are quantified in terms of maximum wiresweep. We find that loop height can have a considerable effect on wiresweep, with the maximum wiresweep being reduced by half (from around 6% to less than 3%) simply by reducing the loop height. Additionally, the study finds that for a given mold process, higher die stacks tend to increase wiresweep, although a threshold stack height exists beyond which further stacking can reduce wiresweep. Lastly, the data suggest that the choice of mold compound can adversely impact wiresweep, especially for test vehicles with traditionally high wiresweep. Having identified these trends, semianalytical models from the literature are used to investigate the cause behind these observations. The analysis suggests that the mold front velocity has the major root impact on package wiresweep. To validate this hypothesis, the series of tests conducted earlier is repeated for a compression mold process, which provides greater control over the mold front velocity. As predicted by the model, significant reduction in wiresweep is achieved. Thus, the compression mold process seems to offer the opportunity for reducing wiresweep without any compromise in the complexity of the die stack.

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Copyright © 2008 by American Society of Mechanical Engineers
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References

Figures

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Figure 1

Schematic of a generic flash memory SCSP. The package type shown is a matrix molded array package (MMAP) with a standard ball grid array (BGA). Different die sizes as well as interconnect technologies can also be combined into a single SCSP if desired.

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Figure 2

Wiresweep for packages with different (a) loop heights and (b) stacking configurations

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Figure 3

Flow load profile on a single wire segment by Tay (6)

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Figure 4

Maximum lateral flow velocity impacting the wiresweep for different looping heights

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Figure 5

Difference in mold front flow profile for stacked packages: (a) schematic (side view), (b) flow front progression at different times during the transfer process (front view), and (c) numerical MOLDFLOW* simulation (top view)

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Figure 6

(a) Schematic of compression mold processes. The compression mold process allows greater control over mold compound transfer velocity, thus providing a mechanism to achieve lower wiresweep. (b) Chase structure utilized for compression molding evaluation (photo courtesy of Towa Corporation).

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Figure 7

(a) Comparison of wiresweep after transfer mold and compression mold. For almost all the DOE legs of Table 1, compression mold shows approximately the same or better wiresweep performance compared to transfer mold. (b) Postmold cross section of stacked die packages after compression mold. No voiding is evident in the package.

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