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RESEARCH PAPERS

Smeared-Property Models for Shock-Impact Reliability of Area-Array Packages

[+] Author and Article Information
Pradeep Lall1

Departments of Mechanical Engineering, Electrical Engineering, and NSF Center for Advanced Vehicle Electronics, Auburn University, Auburn, AL 36849lall@eng.auburn.edu

Dhananjay Panchagade, Yueli Liu, Wayne Johnson, Jeff Suhling

Departments of Mechanical Engineering, Electrical Engineering, and NSF Center for Advanced Vehicle Electronics, Auburn University, Auburn, AL 36849

1

Corresponding author.

J. Electron. Packag 129(4), 373-381 (Mar 25, 2007) (9 pages) doi:10.1115/1.2804085 History: Received December 29, 2004; Revised March 25, 2007

Portable electronics is subjected to extreme accelerations in shock and drop impact. Product development cycle times and the cost constraints often restrict the number of design variations tested for drop robustness prior to identification of the final configuration. Simulation models capable of predicting transient dynamics can provide valuable insight into the design reliability under shock environments. In this study, explicit finite-element models have been used to study the transient dynamics of printed circuit boards during drop from 6ft. Methodologies for modeling components using smeared-property formulations have been investigated. Reduced integration element formulations examined include shell and solid elements. Model predictions have been validated with experimental data. Results show that models with smeared properties can predict transient-dynamic response of board assemblies in drop impact fairly accurately. High-speed data acquisition system has been used to capture in situ strain, continuity, and acceleration data in excess of 1×106sampless. Ultra-high-speed video at 40,000fps has been used to capture the deformation kinematics. Component types examined include plastic ball-grid arrays, tape-array ball-grid array, quad-flat-no-lead package, and conduction-cooled ball-grid array. Model predictions have been correlated with experimental data. Impact of experimental error sources on model correlation with experiments has been also investigated

Copyright © 2007 by American Society of Mechanical Engineers
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Figures

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Figure 1

(a) BGA Test Board A (8mm CSP) and (b) BGA Test Board B

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Figure 2

Location of target points for relative displacement measurement

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Figure 3

Schematic of the drop tower with 0deg and 90deg board configurations

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Figure 4

Shell, solid, and Tet4 models with/detail for the 8mm CSP Test Board A

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Figure 5

Shell, solid, and Tet4 models for Test Board B

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Figure 6

Measurement of initial angle prior to impact

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Figure 7

Repeatability of initial angle with vertical prior to impact (Test Board B)

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Figure 8

Repeatability of relative displacement (Test Board A)

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Figure 9

Correlation of model prediction versus ultra-high-speed video for Test Board A

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Figure 10

Correlation of model (Tet4) prediction versus ultra-high-speed video for Test Board A

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Figure 11

Correlation of model prediction versus ultra-high-speed video for Test Board B

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Figure 12

Relative displacement of board versus board length at 2.4ms

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Figure 13

Drop test results for Sn∕Pb and Sn∕Ag∕Cu solders and different underfills

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Figure 14

Pad I/O PCB side resin crack

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Figure 15

Failed solder joint at package interface

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Figure 16

Cracking of copper and laminate after drop testing. Sample was corner bonded

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Figure 17

Underfill fillet cracking at silicon ship edge

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Figure 18

Aliasing of output data based on output time interval

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