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TECHNICAL PAPERS

Simulations of Process-Induced Warpage During IC Encapsulation Process

[+] Author and Article Information
Shiang-Yu Teng, Sheng-Jye Hwang

Department of Mechanical Engineering, National Cheng Kung University, Tainan 710, Taiwan

J. Electron. Packag 129(3), 307-315 (Dec 11, 2006) (9 pages) doi:10.1115/1.2753936 History: Received May 25, 2006; Revised December 11, 2006

Warpage during integrated circuit encapsulation process is a serious problem. Previous researchers had focused on warpage analysis with thermal-induced shrinkage and the cure-induced shrinkage was neglected. A new approach considering both cure- and thermal-induced shrinkage during encapsulation process was presented to predict the amount of warpage. The cure-induced shrinkage was described by the pressure-volume-temperature-cure (P-V-T-C) equation of epoxy. The thermal-induced shrinkage was described by the coefficients of thermal expansion of the component materials. The thin small outline package (TSOP) DBS-27P and low-profile quad flat package (LQFP) LQFP-64, which were manufactured by Philips Semiconductor located in Taiwan and Siliconware Precision Industries Corporation, respectively, were chosen to be the simulation models. By comparing the amount of predicted warpage with the experimental results, it showed that the approach could better predict the amount of warpage than that considering only thermal-induced shrinkage. It was also found that the sign of cure-induced warpage could be opposite to the thermal-induced warpage. Appropriate design of a package to make cure- and thermal-induced shrinkage to be of opposite sign could minimize the warpage of a package.

Copyright © 2007 by American Society of Mechanical Engineers
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Figures

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Figure 1

Schematic drawing of the volume-shrinkage of EMC

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Figure 2

Schematic drawing of the P-V-T-C tester (not to scale). A, frame; B, heating subsystem; C, loading subsystem; D, clamping subsystem; E, mold; F, data acquisition subsystem

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Figure 3

Schematic drawings of experimental procedure

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Figure 4

Operation chart of mold component

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Figure 5

P-V-T-C plots for the used EMC at (a) 145°C, (b) 160°C, (c) 175°C, and (d) 190°C, respectively

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Figure 6

The outline of DBS-27P

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Figure 7

The cross section of DBS-27P

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Figure 8

The outline of LQFP-64

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Figure 9

The cross section of LQFP-64

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Figure 10

The FE model of DBS-27P

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Figure 11

The FE model of DBS-27P (without EMC)

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Figure 12

The FE model of TQFP-64

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Figure 13

The flow chart for warpage simulation

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Figure 14

Warpage of the DBS-27P package: (a) shape of warpage due to cure-induced shrinkage and (b) shape of warpage due to thermal-induced shrinkage

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Figure 15

Warpage of the TQFP-64 package: (a) shape of warpage due to cure-induced shrinkage and (b) shape of warpage due to thermal-induced shrinkage

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Figure 16

Warpage of DBS-27P package

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Figure 17

Warpage of TQFP-64 package

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