The effect of process-induced voids on the durability of Sn–Pb and Pb-free solder interconnects in electronic products is not clearly understood. Experimental studies have provided conflicting ambiguous conclusions, showing that voids may sometimes be detrimental to reliability, but they may sometimes even increase the reliability of joints, depending on the size and location. Because of the higher level of process-induced voids in Pb-free solders, this debate is more intensified in Pb-free joints. This study presents finite element analysis (FEA) of the influence of void size, location, and spacing on the durability of Pb-free solders. A three-dimensional, global-local, viscoplastic FEA is conducted for a CTBAG132 assembly under thermal cycling. The displacement result of the global FEA at the top and bottom of the critical ball is used as the boundary condition in a local model, which focuses on the details of a single ball of the CTBGA package under temperature cycling. Parametric study is conducted to model a solder ball with voids of different sizes and locations. The maximum void area fraction modeled is from 1% to 49% of the ball area. An energy-partitioning model for cyclic creep-fatigue damage is used to estimate the damage and to monitor the trends as the size and location of voids are varied. Potential sites for maximum damage and crack initiation are identified. FEA results show that as void size increases up to about 15% of the area fraction of the ball, durability increases. For voids bigger than that, the durability starts to decrease. This study also confirms that as voids are located closer to the damage initiation site and the propagation path, their lifespan decreases.