0
Article

A New Wafer Level Packaging Approach: Encapsulation, Metallization and Laser Structuring for Advanced System in Package Manufacturing

[+] Author and Article Information
K.-F. Becker, T. Braun, A. Neumann, A. Ostmann, E. Coko, M. Koch, V. Bader, R. Aschenbrenner, H. Reichl

BeCAP—Berlin Center for Advanced Packaging, Fraunhofer Institute for Reliability and Microintegration—TU Berlin Microperipherics Center, Gustav-Meyer-Allee 25, D-13355 Berlin, Germany

Phone: +49-30/464 03 242, Fax: +49-30/464 03 254

J. Electron. Packag 127(1), 1-6 (Mar 21, 2005) (6 pages) doi:10.1115/1.1846058 History: Received January 06, 2004; Revised June 24, 2004; Online March 21, 2005
Copyright © 2005 by ASME
Your Session has timed out. Please sign back in to continue.

References

Töpper, M., Schaldach, M., Fehlberg, S., Karduck, C., Meinherz, C., Heinricht, K., Bader, V., Hoster, L., Coskina, P., Kloeser, A., Ehrmann, O., and Reichl, H., 1998, “Chip Size Package-The Option of Choice for Miniaturized Medical Devices,” IMAPS, USA.
Goodman,  T., and Elenius,  P., 2004, “Wafer-Level Packaging Today,” Circuits Assembly, 15(2), pp. 28–32.
Becker, K.-F., Ghahremani, C., Jung, E., and Neumann, A., 2003, “Rapid Prototyping for Advanced System Integration,” Good Die Newsletter, 14, pp. 28–32; www.gooddie.net.
Schuenemann, M., Amiri Jam, K., Grosser, V., Leutenbauer, R., Bauer, G., Schaefer, W., and Reichl, H., 2000, “MEMS Modular Packaging and Interfaces,” Proc. ECTC 2000, Las Vegas, NV.
Matuscheck, P., Evers, J., Schaefer, W., Nienhaus, M., and Kleen, S., 2002, “A field mill based on the modular MEMS framework MATCH-X,” Proc. Actuator 2002, June 10–12, Bremen, Germany.
Klein, M., Oppermann, H., Aschenbrenner, R., and Reichl, H., 2002, “Modular Systems for Sensor Integration,” Proc. IMAPS 2002 Denver, CO.
Triantafyllou,  M., Neumann,  K.-T., Reichl,  H., Ansorge,  F., Großer,  V., Becker,  K.-F., Schmidt,  E., and Maier,  R., 1999, “Mechatronics for Automotive and Industrial Applications,” IEEE Trans. Adv. Packag., 22(3), pp. 433–441.
Solberg, V., 2003, “Innovative 3D solutions for multiple die packaging,” Proc. SMTA 2003, Chicago, IL.
Val, C., 2003, “New Approaches to 3D Interconnection Systems in Package Applications,” Proc. IMAPS 2003, Boston, NA.
Boettcher, L., Dombrowski, C., Ostmann, A., and Reichl, H., 2002, “Wafer-level redistribution using fully-additive Cu/Ni/Au metallization,” Proc. SMTA 2002, Chicago, Il.
Jung, E., Aschenbrenner, R., Ostmann, A., Zakel, E., and Reichl, H., 1995, “Flip Chip Soldering and Adhesive Bonding on Organic Substrates,” Proc. JIEMT, Omiya, pp. 67–71.
Cichos, S., 2003, “Radio Frequency Identification (RFID)-Ein Überblick vom EAS-Transponder bis zum multifunktionalen Data-Logger,” Seminar Aufbau- und Verbindungstechniken der Mikroelektronik, Technische Universität Berlin, May 15, Berlin.
Braun, T., Becker, K.-F., Koch, M., Bader, V., Oestermann, U., Manessis, D., Aschenbrenner, R., and Reichl, H., 2002, “Wafer Level Encapsulation-A Transfer Molding Approach to System in Package Generation,” Proc. of EPTC 2002, December 10–11, Singapore.

Figures

Grahic Jump Location
Schematics of a WL package generated using duromer MID processes
Grahic Jump Location
Schematics of the process flow for WLP/MID stackable package generation for a single chip device. The processing at wafer level is also possible.
Grahic Jump Location
Process options for Duromer MID. Left: Schematic of the transfer molding process for a WL SiP module; arrows indicate additional components attached to the active side of the IC. Right: Batch processing for volume production of Duromer MID modules.
Grahic Jump Location
Surface topography of a typical WL EMC after molding
Grahic Jump Location
Surface topography of typical WL EMC after etching in overview (left) and in detail (right), where submicron particles cover larger particles
Grahic Jump Location
AFM analysis of the surface topography of a typical WL EMC prior to (top) and after etching (bottom) showing increased micro roughness for improved mechanical adhesion
Grahic Jump Location
Surface topography of a typical WL EMC after metallization
Grahic Jump Location
SEM images of structured metallization on encapsulant with vias; detail of metallized via from the top (left) and x-sectioned (right)
Grahic Jump Location
Optical microscopic image of a package bottom side with solder balls
Grahic Jump Location
Image of a 3D package stack realized by WLP/MID technology
Grahic Jump Location
RF antenna for a frequency of 13.56 MHz realized in duromer MID technology

Tables

Errata

Discussions

Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In