Highlights from the European Thermal Project PROFIT

[+] Author and Article Information
Clemens J. M. Lasance

Philips Research Laboratories, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands

J. Electron. Packag 126(4), 565-570 (Jan 24, 2005) (6 pages) doi:10.1115/1.1827258 History: Received April 20, 2004; Revised September 21, 2004; Online January 24, 2005
Copyright © 2004 by ASME
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Lasance, C., 2003, “Final Report on the EC-Funded Thermal Project PROFIT,” Proc. 9th THERMINIC Workshop, Aix-en-Provence, pp. 283–290.
Lasance, C., 2003, “Recent Progress in Thermal Compact Modelling,” Proc. SEMITHERM XIX, March, San Jose, pp. 290–299.
Lasanc,  C., 2001, “Two Benchmarks to Facilitate the Study of Compact Thermal Modeling Phenomena,” IEEE CPT, 24, pp. 559–565.
Lasance, C., 2002, “The Accuracy of BCI Compact Thermal Models for Non-Uniformly Distributed Boundary Conditions,” Proc. 8th THERMINIC Workshop, Madrid, pp. 251–259.
Lasance,  C., 2004, “The Influence of Various Common Assumptions on the Boundary-Condition-Independence of Compact Thermal Models,” IEEE CPT, 27, pp. 523–529.
Bosch, E., 2001, “Thermal Compact Models: An Alternative Approach,” Proc. 7th THERMINIC, Paris, pp. 191–196.
Bosch, E., and Sabry, N., 2001, “Thermal Compact Models for Electronic Systems,” Proceedings of SEMI-THERM XVIII, San Jose, CA, pp. 21–29.
Djadoenath, S., and Stehouwer, P., 2000, “Creation and Validation of Compact Thermal Models,” Proc. 6th THERMINIC, Budapest, pp. 217–222.
Pape,  H., Schweitzer,  D., Janssen,  J., Morelli,  A., and Villa,  C., 2003, “Thermal Transient Modeling And Experimental Validation In The European Project PROFIT,” IEEE CPT, 27, pp. 530–538.
Lasance, C., and Sabry, N., 2003, “The Use of Time-Dependent Temperature Response Curves for the Generation of (Dynamic) Compact Thermal Models,” Proc. Interpack, July.
Farkas, G., Poppe, A., Kollar, E., and Stehouwer, P., 2003, “Dynamic Compact Models of Cooling Mounts for Fast Board Level Design,” Proc. SEMI-THERM XIX, 11–13 March, San Jose, CA, pp. 252–262.
Bosch, E., and Lasance, C., 2000, “Accurate Measurement of Interface Thermal Resistance by Means of a Transient Method,” Proc. 16th SEMITHERM, San Jose CA, pp. 167–173.
Bosch,  E., and Lasance,  C., 2000, “High Accuracy Thermal Interface Measurement of Interface Thermal Resistance,” Electronics Cooling, 6(3), pp. 26–32.
Lasance, C., Nicole, C., and van Mil, M., 2003, “Test Equipment for the Measurement of Total Hemispherical Emissivity and Specific Heat,” Internal PROFIT report D5.2, 2003-04-08.
Székely,  V., Ress,  S., Poppe,  A., Török,  S., Magyari,  D., Benedek,  Zs., Torki,  K., Courtois,  B., and Rencz,  M., 2000, “New Approaches in the Transient Thermal Measurements,” Microelectron. Eng., 31, pp. 727–733.
Rencz,  M., 2003, “New Possibilities in the Thermal Evaluation, Offered by Transient Testing,” Microelectron. Eng., 34(3), pp. 171–177.
Szekely,  V., Rencz,  M., Török,  S., and Ress,  S., 2001, “Calculating Effective Board Thermal Parameters from Transient Measurements,” IEEE Trans. Compon. Packag. Technol., 24(4), pp. 605–610.
Rencz, M., Szekely, V., 2003, “Non-Linearity Issues in the Dynamic Compact Model Generation,” Proc. SEMI-THERM XIX, 11–13, March San Jose, pp. 263–270.
Rencz, M., Poppe, A., Szekely, V., and Courtois, B., 2002, “Inclusion of RC Compact Models of Packages into Board Level Thermal Simulation Tools,” Proceedings SEMITHERM XVIII, 1–14 March, San Jose, CA, pp. 71–76.
Warner, M, Parry, J., Bailey, C., Marooney, C., Reeves, H, and Pericleous, K., 2001, “FLO/STRESS: An Integrated Stress Solver for the CFD tool FLOTHERM,” Proceedings of IPACK 2001, 8–13 July, Kauai, Hawaii.
Rencz, M., Szekely, V., Poppe, A., Torki, K., and Courtois, B., 2003, “Electro-Thermal Simulation for the Prediction of Chip Operation within the Package,” Proc. SEMI-THERM XIX, 11–13 March, San Jose, pp. 168–175.
Lasance, C., 2003,“The Urgent Need for Widely Accepted Test Methods for Thermal Interface Materials,” Proc. SEMITHERM XIX, 11–13 March, San Jose, pp. 123–128.
Benedek,  Zs., Courtois,  B., Farkas,  G., Kollar,  E., Mir,  S., Poppe,  A., Rencz,  M., Szekely,  V., and Torki,  K., 2001, “A Scalable Multifunctional Thermal Test Chip Family: Design and Evaluation,” ASME J. Electron. Packag., 123(4), pp. 323–330.
Radivojevic, Z., Abdul-Quadir, Y., Myllykoski, P. and Rantala, J., 2003, “Reliability Prediction for TFBGA Assemblies,” Proc. SEMI-THERM XIX, 11–13 March, San Jose, pp. 336–340.
Lasance,  C., 2003, “Thermally-Driven Reliability Issues in Microelectronic Systems: Status and Challenges,” Microelectron. Reliab., 43, pp. 1969–1974.
van Spengen,  M., “MEMS Reliability from a Failure Mechanisms Perspective,” Microelectron. Reliab., 43, pp. 1049–1060.


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Differences between detailed and compact models for four different boundary conditions. Upper: P-MQFP-80, Lower: P-LFBGA-72.
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Sketch of the interface resistance tester
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Thermal resistance of a soft TIM as a function of pressure
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The differential structure function for an Intel Processor showing various package characteristics
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Sketch of the BGA benchmark. Quarter symmetry. Some parts (substrates and balls) have anisotropic thermal conductivity.
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Compact model of the BGA benchmark
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Heat transfer coefficient distribution using a Copper PCB. Forced convection, v=10 m/s.
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Board analysis extended with footprints and compact models
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Thermal feedback effects in an opamp dominate the transfer characteristics
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Scalable test die with 7×7 elements
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Failure rates for TFBGA 168 packages on an operational test board. PC: power cycling, TC: temperature cycling.




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