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RESEARCH PAPER

Effect of Underfill Entrapment on the Reliability of Flip-Chip Solder Joint

[+] Author and Article Information
Y. C. Chan, M. O. Alam, K. C. Hung, H. Lu, C. Bailey

EPA Centre, Department of Electronic Engineering, City University of Hong Kong, Hong Kong, ChinaSchool of Computing and Mathematical Science, The University of Greenwich, Greenwich, UK

J. Electron. Packag 126(4), 541-545 (Jan 24, 2005) (5 pages) doi:10.1115/1.1756590 History: Received May 01, 2003; Revised April 01, 2004; Online January 24, 2005
Copyright © 2004 by ASME
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References

Wong, C. P., Shi, S., and Jefferson G., 1997, “High Performance Low Cost Underfills for Flip Chip Applications,” IEEE 47th ECTC Proceedings, San Diego, California.
Shi,  S. H., and Wong,  C. P., 1999, “Study of the Fluxing Agent Effects on the Properties of No-Flow Underfill Materials for Flip-Chip Applications,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 22(2), pp. 141–151.
Shi, S. H., Yao, Q., Qu, J., and Wong, C. P., 2000, “Study on the Correlation of Flip-Chip Reliability With Mechanical Properties of No-Flow Underfill Materials,” International Symposium on Advanced Packaging Materials, pp. 271–277.
Fan, L. H., Shi, S. H., and Wong, C. P., 2000, “Incorporation of Inorganic Filler into the No-Flow Underfill Material for Flip-Chip Application,” International Symposium on Advanced Packaging Materials, pp. 303–310.
Tu,  P. L., Chan,  Y. C., and Hung,  K. C., 2001, “Reliability of the MicroBGA Assembly Using No-Flow Underfill, Microelectronics Reliability,” Microelectron. Reliab., 41(12), pp. 1993–2000.
Tu, P. L., 2001, “Reliability Studies of Micro Ball Grind Array Assembly,” Ph. D. thesis, City University of Hong Kong, pp. 96–126.
Jianmin,  Q., and Wong,  C. P., 2002, “Effective Elastic Modulus of Underfill Material for Flip-Chip Applications,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 25(1), pp. 53–55.
Zhuqing, Z., and Wong, C. P., 2001, “A Novel Approach to Incorporate Silica Filler into No-Flow Underfill,” 2001 Int’l Symposium on Electronic Materials and Packaging, pp. 24–28.
Dutta,  I., Gopinath,  A., and Marshall,  C., 2002, “Underfill Constraint Effects during Thermomechanical Cycling of Flip-Chip Solder Joints,” Journal of Electronic Materials, 31(4), pp. 253–264.
Chan,  Y. C., Tu,  P. L., Tang,  C. W., Hung,  K. C., and Lai,  J. K. L., 2001, “Reliability Studies of μBGA Solder Joints–Effect of Ni-Sn Intermetallic Compound,” IEEE Trans. Compon., Packag. Manuf. Technol., Part B, 24(1), pp. 25–32.
PHYSICA, Multi-Physics Ltd, London.
Darveaux, R., and Banerji, K., 1995, “Reliability of PBGA Assembly,” Ball Grid Array Technology, McGraw-Hill, pp. 379–442.
Popelar, S. F., 1998 “A Parametric Study of Flip Chip Reliability Based on Solder Fatigue Modeling,” International Electronics Manufacturing Technology Symposium, pp. 299–307.
Bailey,  C., Lu,  H., and Wheeler,  D., 2002, “Computational Modeling Techniques for Reliability of Electronic Components on Printed Circuit Boards,” Appl. Numer. Math., 40(1–2), pp. 101–117.

Figures

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Accumulated creep strain distribution in solder (a) no trapped underfill and (b) with trapped underfill. Only solder material is shown.
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A model with trapped underfill. The center is filled with solder and therefore the joint still has good electric connection.
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SAM picture of no-flow flip chip sample. Few voids (white spots) inside the underfill layer are observed.
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Schematic diagram of no-flow flip chip bonding with (a) perfect interconnection, (b) underfill entrapment at one edge, both edges or surrounding the periphery of the joint, and (c) no interconnection due to occurrence of underfill layer between solder and pad
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Optical micrograph showing the cross-section of the no-flow flip chip solder joint, which presents a good solder joint interconnection but with underfill entrapment between solder and substrate pad
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Optical micrograph showing the cross-section of the no-flow flip chip solder joint, which presents a good bonding between solder bump and substrate pad
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Optical micrograph showing trapping of thick layer of no-flow underfill after reflow
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Thermal shock conditions
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Measured reflow profile for no-flow flip chip package

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