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RESEARCH PAPER

On the Thermal Performance Characteristics of Three-Dimensional Multichip Modules

[+] Author and Article Information
Wen-Hwa Chen

Department of Power Mechanical Engineering, National Tsing Hua University  

Hsien-Chie Cheng

Department of Aeronautical Engineering, Feng Chia University  

Chih-Han Lin

Department of Power Mechanical Engineering, National Tsing Hua University

J. Electron. Packag 126(3), 374-383 (Oct 06, 2004) (10 pages) doi:10.1115/1.1773198 History: Received October 01, 2003; Revised April 01, 2004; Online October 06, 2004
Copyright © 2004 by ASME
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References

Figures

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The effect of the number of stacked chips in the dummy-die-typed MCM-V
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The effect of the number of stacked chips in the pyramid-typed MCM-V
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The effect of various types of chip stacking designs
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Various chip stacking structures of MCM-V
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A photograph of the thermal test board for MCM-V
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The 3-D FE model of the cross-typed MCM-V assembly (a) The entire assembly (b) The MCM-V
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A schematic plot of the cross-typed, two-chip stacking structures
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The TSP curves of those two cross-typed, stacked chips in the test vehicle (a) The bottom chip (b) The top chip
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The process flow of validation of the proposed FE modeling
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Thermal images of the entire assembly, taken from a standard lens (0.25W/0.25W)
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The distributing configuration of various thermal vias in the Substrate/PCB (a) 0 thermal via (b) 1 thermal via (c) 5 thermal vias (d) 9 thermal vias (e) 13 thermal vias
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The effect of the number of thermal vias
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The effect of the thickness of heat spreader
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The effect of the area of heat spreader
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Thermal images around the package area, taken from a micro lens (0.25W/0.25W) (a) The measuring domain of the micro lens (b) Thermal image (Source side) (c) Isothermal plot
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The surface temperature distribution derived from the DFEA (a) Isotherm of the source side (b) Isothermal plot at the region neighboring the package
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The effect of the thermal conductivities of components

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