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RESEARCH PAPER

On the Thermal Performance Characteristics of Three-Dimensional Multichip Modules

[+] Author and Article Information
Wen-Hwa Chen

Department of Power Mechanical Engineering, National Tsing Hua University  

Hsien-Chie Cheng

Department of Aeronautical Engineering, Feng Chia University  

Chih-Han Lin

Department of Power Mechanical Engineering, National Tsing Hua University

J. Electron. Packag 126(3), 374-383 (Oct 06, 2004) (10 pages) doi:10.1115/1.1773198 History: Received October 01, 2003; Revised April 01, 2004; Online October 06, 2004
Copyright © 2004 by ASME
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References

Chen,  W. H., Cheng,  H. C., and Shen,  H. A., 2003, “An Effective Methodology for Thermal Characterization of Electronic Packaging,” IEEE Transactions on Components and Packaging Technologies, 26(1), March.
Lall, B. S., and Guenin, B. M., 1995, “Methodology for Thermal Evaluation of Multichip Modules,” Eleventh IEEE SEMI-THERM™ Symposium.
Cheng, H. C., Chen, W. H., and Chung, I. C., 2003, “Integration of Simulation and Response Surface Methods for Thermal Design of Multichip Modules,” IEEE Transactions on Components and Packaging Technologies, in press.
Lin, A. W., Lyons, A. M., and Simpkins, P. G., 1993, “Reliability and Thermal Characterization of a 3-Dimension Multichip Module,” 43rd Electronic Components and Technology Conference Proceedings, pp. 71–79.
Cahill,  C., Compagno,  T., O’Donovan,  J., Slattery,  O., Mathuna,  S. C., Barrett,  J., Serthelon,  I., Val,  C., Tigneres,  J., Stern,  J., Ivey,  P., Masgrangeas,  M., and Coello-Vera,  A., 1995, “Thermal Characterization of Vertical Multichip Modules MCM-V,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 18(4), December, pp. 765–772.
Kimura, T., Okuda, O., Ishikawa, H., and Suzuki, Y., 1998, “Bare Chip Stacking Structure for MCM Production,” International Conference on Multichip Modules and High Density Packaging, pp. 303–307.
Yoo, D. I., and Pan, S. H., 2001, “Thermal Analysis of Stacked Die on FBGA Package,” APACK 2001 Conference on Advance in Package, Singapore.
Cho,  S.-J., Park,  S.-W., Park,  M.-G., and Kim,  D.-H., 2000, “A Novel Robust and Low Cost Stack Chips Package and Its Thermal Performance,” IEEE Trans. Adv. Packag., 23(2), May, pp. 257–265.
Yamaji, Y., Ando, T., Morifuji, T., Tomisaka, M., Sunohara, M., Sato, T., and Takahashi, K., 2001, “Thermal Characterization of Bare-die Stacked Modules with Cu Through-Vias,” Electronic Components and Technology Conference Proceedings, 51st, pp. 730–732.
Krishnan, S., Kim, Y. G., and Mohammed, I., 2002, “Thermal Performance Characteristics of Folded Stacked Packages,” 18th IEEE SEMI-THERM™ Symposium, pp. 42–49.
Lee, C. C. James, Luo, and G. D. Kei, 2001, “Design Characteristics of High Performance and Reduced Cost Chip Scale Package-μBGA,” 10th International Flotherm User Conference, Amsterdam, May.
Feng,  A., and Hsieh,  A., 2002, “The Thermal Management of a Several Dies Mutilchip Module,” Advanced Packaging, 5, pp. 30–36.
Ellison, G. N., 1989, Thermal Computation for Electronic Equipment, R. E. Krieger Publishing Company, Malabar, FL.
Ridsdale,  G., Bennett,  J., Bigler,  J., and Torrers,  V. M., 1996, “Thermal Simulation to Analyze Design Features of Plastic Quad Flat Package,” Int. J. Microcircuits Electron. Packag., 19, pp. 103–109.
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Figures

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Various chip stacking structures of MCM-V
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A photograph of the thermal test board for MCM-V
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The 3-D FE model of the cross-typed MCM-V assembly (a) The entire assembly (b) The MCM-V
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A schematic plot of the cross-typed, two-chip stacking structures
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The TSP curves of those two cross-typed, stacked chips in the test vehicle (a) The bottom chip (b) The top chip
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The process flow of validation of the proposed FE modeling
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Thermal images of the entire assembly, taken from a standard lens (0.25W/0.25W)
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The distributing configuration of various thermal vias in the Substrate/PCB (a) 0 thermal via (b) 1 thermal via (c) 5 thermal vias (d) 9 thermal vias (e) 13 thermal vias
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The effect of the number of thermal vias
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The effect of the thickness of heat spreader
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The effect of the area of heat spreader
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The effect of the number of stacked chips in the dummy-die-typed MCM-V
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The effect of the number of stacked chips in the pyramid-typed MCM-V
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The effect of various types of chip stacking designs
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Thermal images around the package area, taken from a micro lens (0.25W/0.25W) (a) The measuring domain of the micro lens (b) Thermal image (Source side) (c) Isothermal plot
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The surface temperature distribution derived from the DFEA (a) Isotherm of the source side (b) Isothermal plot at the region neighboring the package
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The effect of the thermal conductivities of components

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