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TECHNICAL PAPERS

Research of Underfill Delamination in Flip Chip by the J-Integral Method

[+] Author and Article Information
Bulu Xu, Xia Cai, Weidong Huang, Zhaonian Cheng

DaimlerChrysler SIM Lab, Shanghai Institute of Microsystem & Information Technology, Chinese Academy of Sciences, Shanghai 200050

J. Electron. Packag 126(1), 94-99 (Apr 30, 2004) (6 pages) doi:10.1115/1.1648061 History: Received October 01, 2003; Online April 30, 2004
Copyright © 2004 by ASME
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References

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Figures

Grahic Jump Location
Dependence of delamination crack length on the number of thermal cycles for samples of type B and D
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Schematic 2D structure containing a pre-crack on the interface between chip and underfill in flip chip assembly
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Finite element meshes of D type of flip chip assembly containing a pre-crack between chip and underfill (a) and local fine mesh near crack tip (b)
Grahic Jump Location
Flat rectangle path contour around crack tip for calculating J-integral
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J-integral calculated with different path parameters (a) and enlarged view of b/a range 0∼0.5 (b)
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Delamination propagation rate da/dn and energy release rate ΔG of flip chip assemblies tested

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