Maskless Process for Fabrication of Ultra-Fine Pitch Solder Bumps for Flip Chip Interconnects

[+] Author and Article Information
R. T. P. Lee, A. S. Zuruzi, S. K. Lahiri

Institute of Materials Research and Engineering, 3 Research Link, Singapore 117602

J. Electron. Packag 125(4), 597-601 (Dec 15, 2003) (5 pages) doi:10.1115/1.1604806 History: Received May 01, 2002; Online December 15, 2003
Copyright © 2003 by ASME
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Outline of process and experimental steps
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Schematic representation of diameter and height of (a) as-deposited studs and (b) solder bump formed after dipping in molten solder
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Micrographs of solder bumps formed
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Distribution of the height and diameter of as-fabricated gold studs
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Distribution of the height and diameter of solder bumps formed after dipping in (a) 63Sn37Pb and (b) 95.5Sn3.8Ag0.7Cu molten solders
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Micrograph of the cross section for a single solder bump
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Schematic representation of solder flow during and after withdrawal from the solder bath
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Shear test results for 63Sn37Pb and 95.5Sn3.8Ag0.7Cu solder coated bumps
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Micrographs showing the fractured surfaces of the joints upon shear testing: (a) 63Sn37Pb solder coated bumps, (b) 95.5Sn3.8Ag0.7Cu solder coated bumps




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