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TECHNICAL PAPERS

Impact of Die Attach Material and Substrate Design on RF GaAs Power Amplifier Devices Thermal Performance

[+] Author and Article Information
Victor Adrian Chiriac, Tien-Yu Tom Lee

Final Manufacturing Technology Center, Motorola Inc., 2100 E. Elliot Road, Mail Drop EL725, Tempe, AZ 85284

J. Electron. Packag 125(4), 589-596 (Dec 15, 2003) (8 pages) doi:10.1115/1.1604804 History: Received May 01, 2002; Revised February 01, 2003; Online December 15, 2003
Copyright © 2003 by ASME
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References

Figures

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Schematic of wirebonded GaAs IC configuration: (a) details of GaAs IC, and (b) overall system including die, overmold, and PCB
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PCB (printed circuit board) layout
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case A
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case B
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case C
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case D
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case E
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case F
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case G
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(a) (b) Temperature field in the top/bottom portion of the die attach layer—case H
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Maximum PA temperatures versus die attach thermal conductivity
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Temperature drop across die attach for all cases

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