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TECHNICAL PAPERS

A Board Level Study of an Array of Ball Grid Components—Aerodynamic and Thermal Measurements

[+] Author and Article Information
Reena Cole, Mark Davies, Jeff Punch

Stokes Research Institute, Mechanical and Aeronautical Engineering Dept., University of Limerick, Ireland

J. Electron. Packag 125(4), 480-489 (Dec 15, 2003) (10 pages) doi:10.1115/1.1604811 History: Received April 01, 2001; Revised June 01, 2002; Online December 15, 2003
Copyright © 2003 by ASME
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References

Cole,  R., Dalton,  T., Punch,  J., Davies,  M., and Grimes,  R., 2001, “Forced Convection Board Level Thermal Design Methodology,” ASME J. Electron. Packag., 123, pp. 112–119.
Davies,  M. R. D., Cole,  R., and Lohan,  J., 2000, “Factors Affecting the Operational Thermal Resistance of Electronic Components,” ASME J. Electron. Packag., 122, pp. 185–191.
Lohan, J., Davies, M., and Cole, R., 1997, “Thermal Superposition on a Populated Printed Circuit Board,” ASME HTD-Vol. 343, Proceedings of the 32nd National Heat Transfer Conference, Baltimore, Maryland, USA, Vol. 5, pp. 73–82.
Marrs, R., Molnar, R., Lynch, B., Mescher, P., and Olachea, G., 1995, “Recent Technology Breakthroughs Achieved With the New SuperBGA® Package,” Proceedings of International Electronics Packaging Conference, pp. 565–576.
Guenin,  B. M., Marrs,  R. C., and Molnar,  R. J., 1995, “Analysis of Thermally Enhanced Ball Grid Array Package,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 18, pp. 458–468.
Guenin, B. M., Molnar, R. J., and Marrs, R. C., 1996, “Thermal Performance of the SuperBGA® Package,” presented at SEMICON, Korea.
Kang,  S., 1994, “The Thermal Wake Function for Rectangular Electronic Modules,” ASME J. Electron. Packag., 116, pp. 55–59.
Moffat,  R. J., and Anderson,  A. M., 1990, “Applying Heat Transfer Coefficient Data to Electronics Cooling,” ASME J. Heat Transfer, 112, pp. 882–890.
Anderson,  A. M., and Moffat,  R. J., 1992, “The Adiabatic Heat Transfer Coefficient and the Superposition Kernel Function: Part 1—Data for Arrays of Flatpacks for Different Flow Conditions,” ASME J. Electron. Packag., 114, pp. 14–21.
King, D. E., and Wright, N. T., 1999, “Survey of Forced Convection Correlations for Cooling of Electronic Components Mounted on Printed Circuit Boards,” Proceedings of the 33rd National Heat Transfer Conference, Albuquerque, USA, Paper 137.
Lohan, J., and Davies, M. R. D., 1994, “Transient Thermal Behavior of a Board-Mounted 160-Lead Plastic Quad Flat Pack,” Proceedings of the 4th InterSociety Conference on Thermal Phenomena in Electronic Systems, ITHERM, pp. 190–198.
Rosten, H. I., Parry, J. D., Addison, J. S., Viswanath, R., Davies, M., and Fitzgerald, E., 1995, “Development, Validation and Application of a Thermal Model of a Plastic Quad Flat Pack,” presented at 45th Electronic Component Technology Conference, Las Vegas.
JEDEC International Standards, EIA/JESD51-3, 1996, “Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages,” Electronic Industries Alliance, Eng. Dept.
SEMI International Standards, 1996, “G42-0996 Test Method—Thermal Test Board Standardisation for Measuring Junction-to-Ambient Thermal Resistance of Semiconductor Packages,” Packaging Volume, pp. 195–200.
Punch, J., and Davies, M. R. D., 1997, “Still-Air Junction-to-Ambient Thermal Resistances of Different Devices as Functions of the Effective Conductivity of Printed Circuit Boards,” EUROTHERM Seminar No. 58, Thermal Management of Electronic Systems III, Nantes, France, pp. 262–268.
Teerstra, P., Culham, J. R., and Yovanovich, M., 1995, “An Investigation of the Relationship Between Packaging Density and Effective Thermal Conductivity in Laminated Printed Circuit Boards,” Proceedings of International Electronics Packaging Conference, pp. 158–170.
Hamzehdoost, A., and Wong, F., 1995, “Impact of Proximal Heat Sources on the Junction Temperature,” Proceedings of International Electronics Packaging Conference, pp. 521–533.
JEDEC International Standards, EIA/JESD51-7, 1999, “High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages,” Electronic Industries Alliance, Eng. Dept.
Lohan, J., Tillika, P., Rodgers, P., Fager, C.-M., and Rantala, J., 1999, “Effect of PCB Thermal Conductivity on the Operating Temperature of an SO-8 Package in a Natural Convection Environment: Experimental Measurement Versus Numerical Prediction,” Proceedings of the 5th THERMINIC Workshop, pp. 207–213.
Lohan, J., and Davies, M. R. D., 1996, “Thermal Interaction Between Electronic Components,” ASME HTD-Vol. 329, Proceedings of the 32nd National Heat Transfer Conference, Vol. 7, pp. 73–82.
Holman, J. P., 1992, Heat Transfer, McGraw-Hill, New York, 7th ed.
Lohan, J., 1995, “Investigation Into the Thermal Interactions Between Electronic Components on a Printed Circuit Board,” Ph.D. thesis, University of Limerick, Limerick, Ireland.
Grimes, R., and Davies, M., 2001, “Aerodynamic and Thermal Investigation Into Axial Flow Fan Cooling of Electronic Systems Part II: Unsteady Flow Measurements,” Proceedings of ASME National Heat Transfer Conference, Paper No. NHTC2001-20014.

Figures

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Thermal test PCB showing the positions of SuperBGA’s
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Side view and bottom view of SuperBGA® (all dimensions are in mm)
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Cutaway view of the SuperBGA® package 6
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Schematic of PIV system at outlet of medium sized wind tunnel
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Schematic of test vehicle at outlet of wind tunnel
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A composite picture of PIV measurements at an approach velocity of 0.5 m/s, ReL≈1028, predicted flat plate boundary layer growth is also shown
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A composite picture of PIV measurements at an approach velocity of 1 m/s, ReL≈2056, predicted flat plate boundary layer growth is also shown
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A composite picture of PIV measurements at an approach velocity of 2 m/s, ReL≈4112, predicted flat plate boundary layer growth is also shown
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A composite picture of PIV measurements at an approach velocity of 4 m/s, ReL≈8224, predicted flat plate boundary layer growth is also shown
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Velocity profile 144.8 mm from the PCB leading edge with flat plate predictions of δ, the boundary layer thickness, and measurement error bars shown on the 4-m/s curve
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Authors’ impression of secondary flow over a low profile pedestal
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Thermal resistance versus Reynolds number for varying power dissipation for case 1 on each PCB (enhanced radiation)
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Thermal resistance versus Reynolds number for case 1 for PCB’s with and without paint
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Thermal resistance versus Reynolds number in the streamwise direction (a) mid keff PCB, (b) high keff PCB
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Influence factors versus Reynolds numbers for component 4 for boards 2 and 3
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Thermal images of the mid and high effective conductivity PCB’s for cases 1 and 2. (a) Case 1, mid keff PCB, Re≈4100; (b) case 2, mid keff PCB, Re≈4100; (c) case 1, high keff PCB, Re≈4100; (d) case 2, high keff PCB, Re≈4100.

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