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TECHNICAL PAPERS

Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications

[+] Author and Article Information
John H. Lau, S. W. Ricky Lee, Stephen H. Pan, Chris Chang

Agilent Technologies, Inc., 350 W. Trimble Road, MS 90LJ, San Jose, CA 95131

J. Electron. Packag 124(3), 205-211 (Jul 26, 2002) (7 pages) doi:10.1115/1.1462626 History: Received August 09, 2000; Online July 26, 2002
Copyright © 2002 by ASME
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References

Lau, J. H., 2000, Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, McGraw-Hill, New York, NY.
Lau, J. H., and Lee, S. W. R., 2001, Microvias for Low Cost High Density Interconnects, McGraw-Hill, New York, NY.
Tsukada, Y., and Tsuchida, S., 1992, “Surface Laminar Circuit, A Low Cost High Density Printed Circuit Board,” Proceedings of Surface Mount International, Aug., pp. 537–542.
Tsukada, Y., Mashimoto, Y., Nishio, T., and Mii, N., 1992, “Reliability and Stress Analysis of Encapsulated Flip Chip Joint on Epoxy Base Printed Circuit Board,” Proceedings of ASME/JSME Joint Conference on Electronic Packaging, Sept., pp. 827–835.
Lau, J. H., 1992, “Thermal Fatigue Life Prediction of Encapsulated Flip Chip Solder Joints for Surface Laminar Circuit Packaging,” ASME Paper No. 92W/EEP-34, ASME Winter Annual Meeting, Anaheim, CA, Nov.
Lau,  J. H., Krulevitch,  T., Schar,  W., Heydinger,  M., Erasmus,  S., and Gleason,  J., 1993, “Experimental and Analytical Studies of Encapsulated Flip Chip Solder Bumps on Surface Laminar Circuit Boards,” Circuit World, 19(3), pp. 18–24.
Tsukada, Y., Maeda, Y., and Yamanaka, K., 1993, “A Novel Solution for MCM-L Utilizing Surface Laminar Circuit and Flip Chip Attach Technology,” Proceedings of 2nd International Conference on Multichip Modules, Apr., pp. 252–259.
Tsukada, Y., 1994, “Solder Bumped Flip Chip Attach on SLC Board and Multichip Module,” Chip on Board Technologies for Multichip Modules, J. H. Lau, ed., van Nostrand Reinhold, New York, NY, pp. 410–443.
Gonzalez,  C. G., Wessel,  R. A., and Padlewski,  S. A., 1999, “Epoxy-Based Aqueous Processable Photo dielectric Dry Film and Conductive ViaPlug for PCB Build-Up and IC Packaging,” IEEE Trans. Adv. Packag., 22(3), pp. 385–390.
Noddin, D. B., Swenson, E., and Sun, Y., 1998, “Solid State UV-LASER Technology for the Manufacture of High Performance Organic Modules,” Proceedings of IEEE 48th Electronic Components and Technology Conference, Seattle, WA, June, pp. 822–827.
Illyefalvi-Vitez, Z., Ruszinko, M., and Pinkola, J., 1998, “Recent Advancements in MCM-L Imaging and Via Generation by Laser Direct Writing,” Proceedings of 48th Electronic Components and Technology Conference, Seattle, WA, May, pp. 144–150.
Lau,  J. H., and Chang,  C., 2000, “Overview of Microvia Technologies,” Circuit World, 26(2), Jan., pp. 22–32.
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Mawer, A., Simmons, K., Burnette, T., and Oyler, B., 1998, “Assembly and Interconnect Reliability of BGA Assembled onto Blind Micro and Through-Hole Drilled Via in Pad,” Proceedings of Surface Mount International, Aug., pp. 21–28.
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Figures

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(a) SRAM chip with solder bumps, (b) dimensions of the chip
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(a) Top side of the μ VIP substrate, (b) bottom side of the μVIP substrate
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(a) Top side of the μVIP substrate, (b) bottom side of the μVIP substrate, (c) cross section of μVIP, (d) cross section of μVIP, (e) X-ray image of μVIP, (f) closed-up X-ray image of μVIP
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μVIP CSP cross sections. (a) Along the chip pads, (b) along the μVIP, (c) schematic of the μVIP solder joint, (d) cross section of the CSP with μVIP, (e) cross section of the CSP with μVIP, (f) X-ray image of the μVIP CSP assembly.
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(a) and (b) Cross sections of the μVIP CSP PCB assembly
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Details of the μVIP solder joint
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Temperature profile for modeling and testing
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Deformed shape of the μVIP CSP PCB assembly
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Maximum von Mises stress in the corner μVIP solder joint
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Maximum equivalent plastic strain in the corner μVIP solder joint
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Von Mises stress (MPa) in the copper plating of the corner μVIP
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Steady-state creep constitutive relations for the 63Sn-37Pb (Norton creep law) and 62Sn-2Ag-36Pb (Garofalo creep law) solders
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Time-dependent shear stress at the corner μVIP solder joint’s critical location
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Time-dependent shear creep strain at the corner μVIP solder joint’s critical location
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Hysteresis loops of the shear stress and shear creep strain at the μVIP solder joint’s critical location
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Time-dependent creep strain energy density at the μVIP solder joint’s critical location

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