Design and Analysis: Thermal Emulator Cubes for Opto-Electronic Stacked Processor

Shiva P. Gadag; Susan K. Patra; Volkan Ozguz; Phillipe Marchand; Sadik Esener

doi:10.1115/1.1481894

Journal of Electronic Packaging | Volume 124 | Issue 3 | TECHNICAL PAPERS

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TECHNICAL PAPERS

Design and Analysis: Thermal Emulator Cubes for Opto-Electronic Stacked Processor

Shiva P. Gadag, Susan K. Patra, Volkan Ozguz, Phillipe Marchand and Sadik Esener

[+] Author and Article Information

Shiva P. Gadag

Mechanical Engineering Department, University of Colorado at Boulder, Boulder, CO 80309

Susan K. Patra, Phillipe Marchand

Optical Micro-Machines Inc., San Diego, CA 92122

Volkan Ozguz

Irvine Sensors Corporation, Costa Mesa, CA 92626

Sadik Esener

Electrical and Computer Engineering Department, University of California, San Diego, CA 92093-0407

J. Electron. Packag 124(3), 198-204 (Jul 26, 2002) (7 pages) doi:10.1115/1.1481894 History: Received September 05, 2000; Online July 26, 2002

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References

Godfrey, W. M., Tagavi, K. A., Cremers, C. J., and Menguec, M. P., 1993, “Interactive Thermal Modeling of Electronic Circuits Boards,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 16, Dec., pp. 978–985.

Dubek, Rainer, Scherzer, Matthias, Schubert, Andreas, and Michel, Bernd, 1998, “FE-Simulation for Polymeric Packaging Materials,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 21, June, pp. 301–308.

Ito, Satoshi, Mizutani, Masaki, Noro, Hiroshi, Kuwamura, Makoto, and Prabhu, Ashok, 1999, A Novel Flip-Chip Technology Using Nonconductive Resin Sheet, IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 22, June, pp. 158–162.

Yim, M. J., and Paik, K. W., 1998, “Design and Understanding of Anisotropic Conductive Films (ACF’s) for LCD Packaging,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 21, pp. 226–234.

Dudek, Rainer, Meinel, Stefan, Schubert, Andreas, Michel, Bernd, Dorfmueller, Lutz, Knoll, Peter M., and Baumbach, Joerg, 1999, “Flow Characterization and Thermo-Mechanical Response of Anisotropic Conductive Film,” IEEE Trans. Compon., Packag. Manuf. Technol., Part A, 22, June, pp. 177–184.

Reill, Martin, 1984, “Iterative Direct Solution Method for Thermal Analysis,” IEEE, pp. 644–652.

Gadag, Shiva P., Ozguz, Volkan, Patra, Susant K., Marchand, Philippe, and Esener, Sadik, “Thermal Analysis of Multi-layer Stack of Chip Assembly,” Paper to be submitted.

Figures

The composition of composite structural stack of functional Si-processor chip

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The I-Principal stress distribution and stress concentration in the structural stack unit at temperature of 49.7°C due to 0.5 W/layer

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Natural convection of entire thermal emulator cube in free-space with Diamond heat sink and a AlN ceramic cap, showing uniform heat at the core of the cube

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Natural convection of thermal emulator cube in Free-Space with AlN heat sink shows a hot spot confined to the core of the cube

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The quarter cube model of functional emulator cube consisting of (a) Si-active—diamond sink stack and (b) Si active—AlN sink composite stacked layers, to illustrate mode of heat propagation in cross section of the two types entire emulator cubes

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Effect of (a) substrate and (b) forced convection on the temperature of thermal cube

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Thermal resistance of emulator cube-on-AlN plate reduces by an order of magnitude for tenfold increase in convection

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Thermal model of the buffer cube-on-flex cable developed for the thermal simulation

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Silicon spacer (3000 μm) around the active core of buffer consisting of Si-processing stacks is designed for enhanced heat dissipation of buffer module. The Si-active stacks embedded in core of Si-spacer with a ceramic cap of Aluminum Nitride (AlN) on one side of the buffer.

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Thermal distribution in the buffer due to the heat of active Si-processor embedded in the core of emulator cube at a power density of 78.0 W/cm3

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Gadag SP, Patra SK, Ozguz V, Marchand P, Esener S. Design and Analysis: Thermal Emulator Cubes for Opto-Electronic Stacked Processor. ASME. J. Electron. Packag. 2002;124(3):198-204. doi:10.1115/1.1481894.

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Design and Analysis: Thermal Emulator Cubes for Opto-Electronic Stacked Processor

References

Figures

The composition of composite structural stack of functional Si-processor chip

The I-Principal stress distribution and stress concentration in the structural stack unit at temperature of 49.7°C due to 0.5 W/layer

Natural convection of entire thermal emulator cube in free-space with Diamond heat sink and a AlN ceramic cap, showing uniform heat at the core of the cube

Natural convection of thermal emulator cube in Free-Space with AlN heat sink shows a hot spot confined to the core of the cube

The quarter cube model of functional emulator cube consisting of (a) Si-active—diamond sink stack and (b) Si active—AlN sink composite stacked layers, to illustrate mode of heat propagation in cross section of the two types entire emulator cubes

Effect of (a) substrate and (b) forced convection on the temperature of thermal cube

Thermal resistance of emulator cube-on-AlN plate reduces by an order of magnitude for tenfold increase in convection

Thermal model of the buffer cube-on-flex cable developed for the thermal simulation

Silicon spacer (3000 μm) around the active core of buffer consisting of Si-processing stacks is designed for enhanced heat dissipation of buffer module. The Si-active stacks embedded in core of Si-spacer with a ceramic cap of Aluminum Nitride (AlN) on one side of the buffer.

Thermal distribution in the buffer due to the heat of active Si-processor embedded in the core of emulator cube at a power density of 78.0 W/cm3

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