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PAPERS ON RELIABILITY

Interfacial Delamination Near Solder Bumps and UBM in Flip-Chip Packages

[+] Author and Article Information
Yu Gu, Toshio Nakamura

Department of Mechanical Engineering, State University of New York at Stony Brook, Stony Brook, NY 11794

William T. Chen, Brian Cotterell

Institute of Materials Research and Engineering, 3 Research Link, Singapore 117602

J. Electron. Packag 123(3), 295-301 (Aug 01, 2000) (7 pages) doi:10.1115/1.1348338 History: Received December 01, 1999; Revised August 01, 2000
Copyright © 2001 by ASME
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References

Lau, J., 1996, Flip Chip Technologies, the McGraw-Hill, NY.
Rzepka,  S., Korhonen,  M. A., Meusel,  E., and Li,  C. Y., 1998, “The Effect of Underfill and Underfill Delamination on the Thermal Stress in Flip-Chip Solder Joints,” ASME J. Electron. Packag., 120, pp. 342–347.
Rzepka, S., Feustel, F., Meusel, E., Korhonen, M., and Li, C., 1998, “The Effect of Underfill Imperfections on the Reliability of Flip Chip Modules: FEM Simulations and Experiments,” Proceedings—Electronic Components & Technology Conference, pp. 362–370.
Wiegele, S., Thompson, P., Lee, R., and Ramsland, E., 1998, “Reliability and Process Characterization of Electroless Nickel-Gold/Solder Flip Chip Interconnect Technology,” Proceedings—Electronic Components & Technology Conference, pp. 861–866.
Lau,  J., 1993, “Thermal Fatigue Life Prediction of Flip Chip Solder Joints by Fracture Mechanics Method,” Eng. Fract. Mech., 45, No. 5, pp. 643–654.
Gall, C., Qu, J., and McDowell, D., 1996, “Delamination Cracking in Encapsulated Flip Chips,” Proceedings—Electronic Components & Technology Conference, pp. 430–434.
Wang,  J., Qian,  Z., and Liu,  S., 1998, “Process Induced Stresses of a Flip-Chip Packaging by Sequential Processing Modeling Technique,” ASME J. Electron. Packag., 120, pp. 309–313.
Kay, N., Madenci, E., and Shkarayev, S., 1999, “Global/Local Finite Element Analysis for Singular Stress Fields near the Junction of Dissimilar Elastic and Elastic-Plastic Materials in Electronic Packages,” Proceedings—Electronic Components & Technology Conference, pp. 987–993.
Madenci,  E., Shkarayev,  S., and Sergeev,  B., 1998, “Thermo-Mechanical Stresses for a Triple Junction of Dissimilar Materials: Global-Local Finite Element Analysis,” Journal of Theoretic and Applied Fracture Mechanics, 30, pp. 103–117.
Madenci,  E., Shkarayev,  S., and Mahajan,  R., 1998, “Potential Failure Sites in a Flip-Chip Package With and Without Underfill,” ASME J. Electron. Packag., 120, pp. 336–341.
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Figures

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(a) Overall geometry of the flip-chip package showing the locations of solder bumps. (b) Finite element mesh for the half model of the flip-chip package. A rectangular region surrounding a single solder bump is enlarged.
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(a) Detailed cell model which includes UBM and thin layers attached to solder bump. (b) Refined mesh for solder bump and UBM region used the cell analysis. The outline of the solder bump is shown with dashed lines.
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Shades of constant Mises/effective stresses determined from the global model analysis. While circles represent to completely yielded solder bumps.
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Average strains surrounding various solder bumps. The mid-location of solder bump is measured from the center/symmetry line of the global model. The three in-plane components are shown for various substrate thicknesses. (a) t=1.58 mm (b) t=3.16 mm, (c) t=∞ (very thick/constrained).
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Shades of opening stresses in the cell model for #9 solder bump for t=∞ after ΔT=−160°C. (a) Horizontal normal stress σh, (b) vertical normal stress σv. The locations of high stress regions are indicated by A and B.
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Energy release rate of short corner delamination as a function of temperature drop for various solder bumps. (a) Crack tip 1 and (b) crack tip 2. The crack length are fixed at a1=a2=2.1 μm near.
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Fracture parameters of crack tips 1 and 2 versus crack length. The results are for #9 solder bump. Note only one crack length is varied while the other is held at a=2.1 μm. (a) Energy release rate, (b) phase angle.
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Schematic of a long delamination near UBM. The crack is along the underfill-Si3N4, Cu-solder and Cu-Ni interfaces. The total crack length is 51 μm. The energy release rate and phase angle for #1 and #9 solder bumps are indicated at the two crack tips 1 and 2.
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Schematic of a long delamination near UBM. The crack is along the Si3N4-Al, Cu-solder and Ni-solder interfaces. The total crack length is 50 μm. The energy release rate and phase angle for #1 and #9 solder bumps are indicated at the two crack tips 1 and 2.
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Schematic of a long delamination near triple junction of solder, underfill and Cu pad. The crack is along the Cu pad-solder, solder-underfill and Cu pad-underfill interfaces. The total crack length is 73 μm. The energy release rate and phase angle for #1 and #9 solder bumps are indicated at the three crack tips 1, 2, and 3.

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