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TECHNICAL PAPERS

Micro-Mechanical Deformation Analysis of Surface Laminar Circuit in Organic Flip-Chip Package: An Experimental Study

[+] Author and Article Information
B. Han

Department of Mechanical Engineering, University of Maryland, College Park, MD 20742

P. Kunthong

Mechanical Engineering Department, Clemson University, Clemson, SC 29634

J. Electron. Packag 122(4), 294-300 (May 15, 2000) (7 pages) doi:10.1115/1.1290000 History: Revised May 15, 2000
Copyright © 2000 by ASME
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References

Figures

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Schematic diagram of surface laminar circuit substrate (after Tsukada 5)
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Schematic diagram of (a) a flip chip assembly on a SLC substrate, (b) the assembly inserted in a precision vise, and (c) the assembly after specimen preparation
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Micrographs of the region of interest
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Microscopic U and V displacement fields of the region of interest shown in Fig. 3: (a) bare substrate, (b) flip chip assembly, and (c) flip chip assembly after canceling rigid-body rotation. The contour interval is 104 nm per fringe.
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Microscopic U and V displacement fields of the region, marked by the dashed box in Fig. 3, with a higher sensitivity: (a) bare substrate and (b) flip chip assembly. The contour interval is 52 nm per fringe.
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(a) Deformed shape of the surface laminar layer and (b) average shear strain distribution as a function of DNP
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Stress-induced strain distributions through the thickness of the photosensitive dielectric layer (AA)
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Stress-induced strain distributions along the solder resist mask (BB)
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(a) Deformed shape of the metal via segment CC in the flip chip assembly and (b) shear strain distribution along CC
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Effect of the CTE mismatch between the chip and the substrate

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