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TECHNICAL PAPERS

Thermal Characterization of Electronic Packages Using a Three-Dimensional Fourier Series Solution

[+] Author and Article Information
J. R. Culham, M. M. Yovanovich

Microelectronics Heat Transfer Laboratory, Department of Mechanical Engineering, University of Waterloo, Waterloo, Canada

T. F. Lemczyk

Louisiana State University, Baton Rouge, LA 70821

J. Electron. Packag 122(3), 233-239 (Sep 01, 2000) (7 pages) doi:10.1115/1.1287928 History:
Copyright © 2000 by ASME
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References

Gray,  P. R., 1971, “Analysis of Electrothermal Integrated Circuits,” IEEE J. Solid-State Circuits, SC-6, No. 1, pp. 8–14.
Kokkas,  A. G., 1974, “Thermal Analysis of Multiple-Layer Structures,” IEEE Trans. Electron Devices, ED-21, No. 11, pp. 674–681.
Lemczyk, T. F., Culham, J. R., and Yovanovich, M. M., 1989, “Analysis of Three-Dimensional Conjugate Heat Transfer Problems in Microelectronics,” Numerical Methods in Thermal Problems, Proceedings of the Sixth International Conference, Swansea, U.K., pp. 1346–1356.
Carslaw, H. S., and Jaeger, J. C., 1959, Conduction of Heat in Solids, Second Edition, Oxford University Press, Oxford.
Albers, J., 1994, “An Exact Recursion Relation Solution for the Steady-State Surface Temperature of a General Multilayer Structure,” Proceedings of the 10th IEEE Semiconductor Thermal Measurement and Management Symposium, Austin, TX, pp. 129–137.
Lemczyk, T. F., and Culham, J. R., 1992, “Thermal Analysis of Electronic Package Components,” Microelectronics Heat Transfer Laboratory Report, UW/MHTL 9112 G-37, University of Waterloo, Waterloo, Canada, April, 1992.
Kelman,  R. B., 1979, “Least Squares Fourier Series Solutions To Boundary Value Problems,” SIAM Rev., 21, No. 3.
Sullhan, R., Fredholm, M., Monaghan, T., Agarwall, A., and Kozarek, B., 1991, “Thermal Modeling and Analysis of Pin Grid Arrays and Multichip Modules,” Proceedings of the 7th IEEE Semiconductor Thermal Measurement and Management Symposium, Phoenix, AZ, pp. 110–116.
Lasance, C., Vinke, H., Rosten, H., and Weiner, K., 1995, “A Novel Approach for the Thermal Characterization of Electronic Parts,” Proceedings of the Eleventh Annual IEEE Semiconductor Thermal Measurement and Management Symposium, San Jose, CA, pp. 1–9.
Temmerman, W., Nelemans, W., Goossens, T., Lauwers, E., Lacaze, C., and Zemlianoy, P., 1995, “Validation of Thermal Models for Electronic Components,” Proceedings of the Technical Conference, International Electronics Packaging Conference, San Diego, CA, pp. 142–150.
Bar-Cohen, A., 1994, “Trends in the Packaging of Computer Systems,” Cooling of Electronic Systems, S. Kakac, H. Yuncu, and K. Hijikata, eds., Series E: Applied Sciences-Vol. 258, Kluwer Academic Publishers, Norwell, MA.

Figures

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Multiple layer substrate
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Various package geometries reproduced from sketches in Bar-Cohen 11
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Coordinate system for package model
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Die plane control surfaces; (a) single source, (b) multiple sources
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Conductive and radiative heat transfer paths in an open cavity package
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Profiles of packages used for model validation; (a) validation chip module, (b) 208 pin plastic quad flat pack, (c) cavity up multichip module

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