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TECHNICAL PAPERS

Analysis of Bending and Shearing of Tri-Layer Laminations for Solder Joint Reliability

[+] Author and Article Information
E. K. Buratynski

Bell Laboratories, Lucent Technologies, P. O. Box 900, Princeton N.J. 08542

J. Electron. Packag 120(3), 221-228 (Sep 01, 1998) (8 pages) doi:10.1115/1.2792626 History: Received July 11, 1997; Revised February 20, 1998; Online December 05, 2007

Abstract

For solder joint reliability reasons, direct chip attach technology uses an underfill material to restrict the movement of the silicon die relative to the substrate due to differences in their coefficients of thermal expansion. Modeling the fatigue life of a solder joint assembled with this technology requires a shear strain versus applied shear stress relationship. The direct chip attach configuration can be modeled as a tri-layer lamination that bends and shears with temperature excursions from the stress-free temperature. The present analysis formulates an axisymmetric, tri-layer, elastic material stress model with finite radii for the silicon die and underfill layer and an infinite sized substrate layer. A closed form solution to the shear distributions at the interfaces and the bending of the lamination is presented. This solution is a function of the reactant forces exerted by solder joints and forms the basis of a fatigue life model.

Copyright © 1998 by The American Society of Mechanical Engineers
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