Optimal Chip Layout on a Printed Circuit Board Using Design Sensitivity Analysis of Subdomain Configuration

[+] Author and Article Information
Seo Jin Joo, Byung Man Kwak

Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology, 373-1 Kusong-dong, Yusong-ku, Taejon, 305-701, Korea

J. Electron. Packag 117(4), 275-280 (Dec 01, 1995) (6 pages) doi:10.1115/1.2792105 History: Received September 04, 1993; Revised June 05, 1995; Online November 06, 2007


A chip layout problem is formulated as a new class of shape optimal design called a subdomain optimization, where the chips correspond to subdomains whose configuration and location are to be decided. Shape design sensitivity analysis for a perturbed subdomain is made based on the concept of material derivative and adjoint system. Introducing a suitable category of design velocity fields, the change of the configuration is adequately describable. Sensitivities and optimal positions of chips on a printed circuit board are obtained and their accuracy discussed.

Copyright © 1995 by The American Society of Mechanical Engineers
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