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RESEARCH PAPERS

Thermal Stress Measurement in Silicon Chips Encapsulated in IC Plastic Packages Under Temperature Cycling

[+] Author and Article Information
Hideo Miura, Makoto Kitano, Asao Nishimura, Sueo Kawai

Mechanical Engineering Research Laboratory, Hitachi, Ltd., Tsuchiura, Ibaraki, Japan

J. Electron. Packag 115(1), 9-15 (Mar 01, 1993) (7 pages) doi:10.1115/1.2909307 History: Revised January 01, 1993; Online April 28, 2008

Abstract

Thermal stress in silicon chips encapsulated in IC plastic packages is discussed. A stress-sensing chip which can detect the three-dimensional stress components separately is developed. Thermal stress occurs in the silicon chip almost linearly with temperature at the steady state. The stress path with temperature during heating is the same as that during cooling. On the other hand, during temperature cycling, stress hysteresis is observed, and the stress increases gradually with increasing cycles. The stress increase phenomenon occurs due to the viscoelastic phenomenon of the molding compounds. The stress-increase ratio is determined by the relationship between the cycle period and the stress relaxation time of the molding compounds at temperatures of interest.

Copyright © 1993 by The American Society of Mechanical Engineers
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