Piezoresistive Stress Sensors for Structural Analysis of Electronic Packages

[+] Author and Article Information
D. A. Bittle, J. C. Suhling

Department of Mechanical Engineering, and Alabama Microelectronics Science and Technology Center, Auburn University, Auburn, AL 36849

R. E. Beaty, R. C. Jaeger, R. W. Johnson

Department of Electrical Engineering, and Alabama Microelectronics Science and Technology Center, Auburn University, Auburn, AL 36849

J. Electron. Packag 113(3), 203-215 (Sep 01, 1991) (13 pages) doi:10.1115/1.2905397 History: Revised June 26, 1991; Online April 28, 2008


Structural reliability of electronic packages has become an increasing concern for a variety of reasons including the advent of higher integrated circuit densities, power density levels, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors. In this paper, the theory of conduction in piezoresistive materials is reviewed and the basic equations applicable to the design of stress sensors on test chips are presented. General expressions are obtained for the stress-induced resistance changes which occur in arbitrarily oriented one-dimensional filamentary conductors fabricated out of crystals with cubic symmetry and diamond lattice structure. These relations are then applied to obtain basic results for stressed in-plane resistors fabricated into the surface of (100) and (111) oriented silicon wafers. Sensor rosettes developed by previous researchers for each of these wafer orientations are reviewed and more powerful rosettes are presented along with the equations needed for their successful application. In particular, a new sensor rosette fabricated on (111) silicon is presented which can measure the complete three-dimensional stress state at points on the surface of a die

Copyright © 1991 by The American Society of Mechanical Engineers
Topics: Sensors , Stress
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