Accepted Manuscripts

Fumihiro Inoue, Anne Jourdain, Lan Peng, Alain Phommahaxay, Daisuke Kosemura, Ingrid De Wolf, Kenneth June Rebibis, Andy Miller, Erik Sleeckx and Eric Beyne
J. Electron. Packag   doi: 10.1115/1.4040002
The diamond abrasive process which is applied onto the silicon wafer edge, the so called ‘edge trimming’, is an important step in 3-D microelectronics processing technology, due to the significant thickness reduction of the wafer after thinning. Nevertheless, the wafer edge defects caused by edge trimming have often been overlooked. Although the mechanisms of the formation of the defects in Si due to trimming may be similar to the ones caused by grinding, an in-depth study and risk assessment have not been done yet. In addition, the variety of stress relief processing options can give different morphology and defect removal behavior on the edge trimmed Si sidewall. In a first study, we used transmission electron microscopy and Raman spectroscopy to analyze the defects caused by edge trimming. We show the presence of a continuous layer of amorphous Si and of different phases of Si, caused by edge trimming. A comparison of the damage induced in the Si by two different integration schemes is also discussed. When polishing is used for stress release, the observed sidewall defects stay , since the polishing force is only applied on the top surface of the wafer. On the other hand, the damage is completely removed for the case of wet and dry etching. The surface chemical reactions occurring at the surface during these processes are also acting on the Si sidewall. These findings provide a workable edge trimming and stress relief method for permanently bonded wafers, with many industrial applications.
TOPICS: Semiconductor wafers, Stress, Polishing, Damage, Chemical reactions, Dry etching, Grinding, Diamonds, Risk assessment, Transmission electron microscopy, Microelectronic devices, Raman spectroscopy
Tahany I. Elwardany, Ying She, Vijay N. Jagdale, Jacquelynn K. Garofano, Joe J. Liou and Wayde R. Schmidt
J. Electron. Packag   doi: 10.1115/1.4039974
With recent advancements in additive manufacturing (AM) technology, it is possible to deposit copper conductive paths and insulation layers of an electric machine in a selective controlled manner. AM of copper enables higher fill factors that improves the internal thermal conduction in the stator core of the electric machine (induction motor), which will enhance its efficiency and power density. This will reduce the motor size and weight and make it more suitable for aerospace and electric vehicle applications, while reducing / eliminating the rare-earth dependency. The objective of this paper is to present the challenges associated with AM of copper coils having 1x1mm cross section and complex features that are used in producing ultra-high efficiency induction motor for traction applications. The paper also proposes different approaches that were used by the authors in attempts to overcome those challenges. The results of the developed technologies illustrate the important of copper powder treatment to help in flowing the powder easier during deposition. In addition, the treated powder has higher resistance to surface oxidation which led to a high reduction in porosity formation and improved the quality of the copper deposits. The LPDED process modeling approach helps in optimizing the powder deposition path, the laser power and feed rate that allow the production of porosity free thin wall and thin floor components. The laser powder bed fusion models identify the optimum process parameters that are used to produce test specimens with >90% density and minimum porosity.
TOPICS: Electrical conductivity, Thermal conductivity, Copper, Additive manufacturing, Porosity, Engines, Motors, Electromagnetic induction, Lasers, Machinery, Power density, Density, Weight (Mass), Heat conduction, Copper powders, Stators, Thin wall structures, Traction, Aerospace industry, Modeling, Electric vehicles, Insulation, oxidation
Guest Editorial  
Kaushik Mysore, Sreekant Narumanchi, Eric Dede and Reza Khiabani
J. Electron. Packag   doi: 10.1115/1.4039963
Part 2 of the Guest Editorial for the Special Section on InterPACK 2017
Aaron Knobloch, Chris Kapusta, Jason Karp, Yuri Plotnikov, Jason B. Siegel and Anna G. Stefanopoulou
J. Electron. Packag   doi: 10.1115/1.4039861
This paper details the fabrication and testing of a combined temperature and expansion sensor to improve state of charge and state of health estimation for Li-ion batteries. These sensors enable the characterization of periodic stress and strain changes in the electrode materials of Lithium-ion batteries during the charge and discharge process. These ultra-thin sensors are built on a polyimide substrate which can enable direct integration between cells without compromising safety or cell cooling design. Leveraging the sensor design and fabrication process used to create inductive coil eddy current sensors for crack detection, these sensors were characterized on three Panasonic 5 Amp-hr cells showing the capability to measure free and constrained expansion of Li-ion batteries. By sensing the intercalation effects which cause cell expansion, improvements in estimation of state of health and state of charge can be enabled through the use of more relevant physics based battery models which combine the thermal, mechanical, and electro-chemical aspects of its operation.
TOPICS: Sensors, Manufacturing, Lithium-ion batteries, Design, Electrodes, Testing, Crack detection, Batteries, Eddies (Fluid dynamics), Safety, Physics, Temperature, Cooling, Eddy currents (Electricity), Stress
Zygimantas Staliulionis, Helene Conseil-Gudla, Sankhya Mohanty, Masoud Jabbari, Rajan Ambat and Hattel Jesper Henri
J. Electron. Packag   doi: 10.1115/1.4039790
The aim of this paper is to model moisture ingress into a closed electronic enclosure under isothermal and non-isothermal conditions. As a consequence, an in-house code for moisture transport is developed using the well-known Resistor-Capacitor (RC) method, which is efficient with computation time and resources; a requirement that has typically been a hindrance to the usage of conventional CFD or FEM approaches. The paper covers moisture build-up inside electronic enclosure when exposed to a constant and cyclic ambient moisture concentration and temperature. The model couples a lumped analysis of moisture transport into a box interior with a modified 1-D analogy of Fick’s second law for diffusion in the walls of the box. To model moisture transport under non-isothermal conditions, the moisture RC circuit is coupled with a thermal RC circuit. Under isothermal conditions, the impact of imperfections in the enclosure on the whole diffusion process was analyzed. Additionally, study of the impact of wall thickness, initial conditions in the wall and different diffusion coefficient was accomplished. The experimental and modelling results show that diffusion is the key factor for moisture diffusion through the wall and the imperfections with certain limits, do not have a significant effect on interior moisture response. Under non-isothermal conditions, the internal moisture oscillations follow temperature change albeit with a delay. It is also slightly dependent on ambient moisture oscillations, however such effects are not dominant until equilibrium is reached.
TOPICS: Modeling, Diffusion (Physics), Oscillations, Temperature, Circuits, Computation, Delays, Finite element model, Resistors, Wall thickness, Capacitors, Diffusion processes, Equilibrium (Physics), Finite element methods, Computational fluid dynamics
Paul Vianco, Alice C Kilgo and Bonnie B McKenzie
J. Electron. Packag   doi: 10.1115/1.4039749
This study examined the cause of non-wetted regions of the gold (Au) finish on iron-nickel (Fe-Ni) alloy lids that seal ceramic packages using the 80Au-20Sn solder (wt.%, abbreviated Au-Sn) and their impact on the final lid-to-ceramic frame solder joint. The Auger Electron Spectroscopy (AES) surface and depth profile techniques identified surface and through-thickness contaminants in the Au metallization layer. In one case, the AES analysis identified background levels of carbon (C) contamination on the surface; however, the depth profile detected Fe and Ni contaminants that originated from the plating process. The Fe and Ni could impede the completion of wetting and spreading to the edge of the Au metallization. The Au layer of lids not exposed to a Au-Sn solder reflow step had significant surface and through-thickness C contamination. Inorganic contaminants were absent. Subsequent simulated reflow processes removed the C contamination from the Au layer without driving Ni diffusion from the underlying solderable layer. A Au metallization having negligible C contamination developed elevated C levels after exposure to a simulated reflow process due to C contamination diffusing into it from the underlying Ni layer. However, the second reflow step removed that contamination from the Au layer, thereby allowing the metallization to support the formation of lid-to-ceramic frame Au-Sn joints without risk to their mechanical strength or hermeticity.
TOPICS: Solders, Wetting, Contamination, Tin, Ceramics, Iron, Reflow soldering, Solder joints, Risk, Carbon, Diffusion (Physics), Nickel, Alloys, Plating, Strength (Materials), Augers, Finishes, Electron spectroscopy
Filippo Cataldo and John R. Thome
J. Electron. Packag   doi: 10.1115/1.4039706
The present paper proposes a proof of concept of a completely passive thermosyphon for cooling of power electronics. This thermosyphon is composed of an evaporator to cool down a four-heater pseudo-transistor module and a natural air-cooled condenser to reject the heat into the environment. R1234ze, R1234yf, and R134a are used as the working fluids with charges of 524, 517 and 566 grammes, respectively, for the low charge tests, and 720, 695, and 715 grammes for the high charge tests. It has been demonstrated that the refrigerant R1234ze with a low charge is not a good solution for the cooling system proposed here since low evaporator performance and fluid instability have been detected at moderate heat fluxes. In fact, R1234ze needed a large charge of refrigerant to be safely used, reaching a transistor temperature of 53 °C at a heat load of 65 W. R1234yf and R134a, on the other hand, showed good results for both the low and the high charge cases. The maximum temperatures measured, respectively, were 52 °C and 48 °C at 65 W for the low charge case and 55 °C and 47 °C at 62 W for the high charge case. The corresponding values of overall thermal resistances of the thermosyphon at the maximum heat load are very similar for the working fluids R1234yf and R134a, being in the range of 0.44 -0.46 K=W.
TOPICS: Heat, Fluids, Cooling systems, Natural convection, Refrigerants, Transistors, Temperature, Stress, Cooling, Flux (Metallurgy), Electronics, Condensers (steam plant)
J. Electron. Packag   doi: 10.1115/1.4039660
Chirag Kharangate, Ki Wook Jung, SangWoo Jung, Daeyoung Kong, Joseph Schaadt, Madhusudan Iyengar, Christopher G. Malone, Hyoungsoon Lee, Dr. Mehdi Asheghi and Kenneth Goodson
J. Electron. Packag   doi: 10.1115/1.4039475
Three-dimensional stacked IC chips offer significant performance improvement, but offer important challenges for thermal management including, for case of microfluidic cooling, constraints on channel dimensions and pressure drop. Here we investigate heat transfer and pressure drop characteristics of a micro-fluidic cooling device with staggered pin-fin array arrangement with dimensions as follows: diameter D = 46.5 µm; spacing, S ~ 100 µm; and height, H ~ 110 µm. De-ionized single-phase water with mass flow rates of = 15.1 - 64.1 g/min was used as the working fluid, corresponding to values of Re (based on pin fin diameter) from 23 to 135, where heat fluxes up to 141 W/cm2 are removed. The measurements yield local Nusselt numbers that vary little along the heated channel length and values for both the Nu and the friction factor do not agree well with most data for pin fin geometries in the literature. Two new correlations for the average Nusselt number (~Re1.04) and Fanning friction factor (~Re-0.52) are proposed that capture the heat transfer and pressure drop behavior for the geometric and operating conditions tested in this study with mean absolute error (MAE) of 4.9% and 1.7%, respectively. The work shows that a more comprehensive investigation is required on thermofluidic characterization of pin fin arrays with channel heights Hf < 150 µm and fin spacing S= 50 - 500 µm, respectively, with the Reynolds number, Re < 300.
TOPICS: Heat transfer, Fins, Pressure drop, Cooling, Friction, Dimensions, Microfluidics, Errors, Reynolds number, Flux (Metallurgy), Heat, Fluids, Thermal management, Water, Flow (Dynamics)
Karumbu Meyyappan, Milena Vujosevic, Qifeng Wu, Pramod Malatkar, Charles Hill and Ryan Parrott
J. Electron. Packag   doi: 10.1115/1.4039301
This paper intends to address an important gap between reliability standards and the physics of how components respond to real use conditions using a knowledge based qualification (KBQ) process. Bridging the gap is essential to developing test methods that better reflect field performance. With the growth in importance of automotive market and the wide usage of electronics in this market, vibration induced failures was chosen for this study. MIL-STD-810G and ISTA4AB are couple of industry standards that address the risk of shipping finished goods to a customer. For automotive electronic products that are exposed to vibration conditions all through their life, USCAR-2 and GMW-3172 are more relevant. Even though the usage models and transportation duration for shipping fully packaged systems is different from automotive electronics, the source of energy (road conditions), driving the risks, are similar. The industry standards based damage models appear to be generic, covering a wide variety of products and failure modes. Whereas, the KBQ framework, used in this paper, maps use conditions to accelerated test requirements for only two failure modes: solder joint fatigue and socket contact fretting. The mechanisms were chosen to be distinct with different damage metric and drivers. The process is intended to explain how industry standards reflect field risks for two of the risks relevant for automotive electronics.
TOPICS: Electronic components, Vibration, Failure, Electronics, Engineering standards, Damage, Failure mechanisms, Transportation systems, Physics, Fatigue, Reliability, Roads, Solder joints, Electronic products, Risk
Mandel Raphael, Bae Daniel and Ohadi Michael
J. Electron. Packag   doi: 10.1115/1.4039264
The increasing heat densities in electronic components and focus on energy efficiency have motivated utilization of embedded two-phase cooling, which reduces system-level thermal resistance and reduces pumping power. To achieve maximum benefit, high heat fluxes and vapor qualities should be achieved simultaneously. While many researchers have achieved heat fluxes in excess of 1 kW/cm2, vapor qualities are often below 10%, requiring a significantly large amount of energy spent on sub-cooling or pumping power, which minimizes the benefit of using two-phase thermal transport. In this work, we describe our recent work with cooling devices utilizing Film Evaporation with an Enhanced fluid Delivery System, known as FEEDS. The design, calibration, and experimental testing of a press-fit and bonded FEEDS test section are detailed here. Heat transfer and pressure drop performance was characterized and discussed. With the press-fit Si test chip, heat fluxes in excess of 1 kW/cm2 were obtained at vapor qualities approaching 45% and a coefficient of performance approaching 1400. With the bonded SiC test chip, heat fluxes in excess of 1 kW/cm2 were achieved at a vapor quality of 85% and heat densities approaching 490 W/cm3.
TOPICS: Cooling, Electronics, Coolers, Press fits, Heat, Vapors, Flux (Metallurgy), Energy efficiency, Design, Electronic components, Evaporation, Testing, Calibration, Pressure drop, Thermal resistance, Heat transfer, Fluids
Hannes Greve, S. Ali Moeini, Patrick McCluskey and Shailesh Joshi
J. Electron. Packag   doi: 10.1115/1.4039265
Transient Liquid Phase Sintering (TLPS) is a novel high temperature attach technology of particular interest for application as a die attach in power electronic. TLPS joints are comprised of metallic particles embedded in matrices of brittle Intermetallic Compounds (IMCs). This raises the concern that TLPS joints are susceptible to brittle failure. In this paper we analyze the cooling-induced formation of vertical cracks as a newly detected failure mechanism unique to TLPS joints. In a power module with a TLPS attach between a power device and a Direct Bond Copper (DBC) substrate, cracks can form between the interface of the DBC and the TLPS joint when large voids are located near the DBC. These cracks do not appear near small voids. A method has been developed for the modelling of paste-based TLPS sinter joints that possess complex microstructures. Thermo-mechanical simulations of post-sintering cooling have been performed and the influence of microstructure on the stress-responses has been characterized for three different material systems (Cu+Cu6Sn5, Cu+Cu3Sn, Ni+Ni3Sn4). The principal stress within the assembly was found to be a poor indicator for prediction of vertical crack formation. In contrast, stress levels at the interface between the TLPS joint and the power substrate metallization are good indicators for this failure mechanism. Small voids lead to higher joint maximum principal stresses, but large voids induce higher interfacial stresses, which explains why vertical cracking failure was only observed in joints with large voids.
TOPICS: Simulation, Transients (Dynamics), Cracking (Materials), Fracture (Process), Thermomechanics, High temperature, Tension-leg platforms, Stress, Fracture (Materials), Failure mechanisms, Failure, Sintering, Brittleness, Cooling, Copper, Intermetallic compounds, Particulate matter, Manufacturing, Sinter (Metallurgy), Modeling
Pavan Kumar Vaitheeswaran and Ganesh Subbarayan
J. Electron. Packag   doi: 10.1115/1.4039136
Particulate thermal interface materials (TIMs) are commonly used to transport heat from chip to heat sink. While high thermal conductance is achieved by large volume loadings of highly conducting particles in a compliant matrix, small volume loadings of stiff particles will ensure reduced thermal stresses in the brittle silicon device. Developing numerical models to estimate effective thermal and mechanical properties of TIM systems would help optimize TIM performance with respect to these conflicting requirements. Classical models, often based on single particle solutions or regular arrangement of particles, are insufficient as real-life TIM systems contain a distriubtion of particles at high volume fractions, where classical models are invalid. In our earlier work, a computationally efficient random network model was developed to estimate the effective thermal conductivity of TIM systems [1, 2]. This model is extended in this paper to estimate the effective elastic modulus of TIMs. Realistic microstructures are simulated and analyzed using the proposed method. Factors affecting the modulus (volume fraction and particle size distribution) are also studied.
TOPICS: Particulate matter, Mechanical properties, Network models, Thermal conductivity, Elastic moduli, Heat sinks, Computer simulation, Brittleness, Thermal stresses, Particle size, Silicon, Heat
Sami Alkharabsheh, Udaya L N Puvvadi, Bharath Ramakrishnan, Kanad Ghose and Bahgat Sammakia
J. Electron. Packag   doi: 10.1115/1.4039137
In this paper, the impact of direct liquid cooling (DLC) system failure on the IT equipment is studied experimentally. The main factors that are anticipated to affect the IT equipment response during failure are the CPU utilization, coolant set point temperature (SPT) and the server type. These factors are varied experimentally and the IT equipment response is studied in terms of chip temperature and power, CPU utilization, and total server power. It was found that failure of this cooling system is hazardous and can lead to data center shutdown in less than a minute. Additionally, the CPU frequency throttling mechanism was found to be vital to understand the change in chip temperature, power, and utilization. Other mechanisms associated with high temperatures were also observed such as the leakage power and the fans speed change. Finally, possible remedies are proposed to reduce the probability and the consequences of the cooling system failure.
TOPICS: Cooling systems, Data centers, Failure analysis, Failure, Temperature, Cooling, Coolants, System failures, Fans, Probability, Leakage, High temperature
David Schwartz, Clinton J. Smith, Joseph Lee, Shakthi P. Gowri, George Daniel, Christopher Lalau-Keraly, Quentin Baudenon and J.R.M. Saavedra
J. Electron. Packag   doi: 10.1115/1.4039138
PARC, a Xerox Company, is developing a low-cost system of peel-and-stick wireless sensors that will enable widespread building environmental sensor deployment with the potential to deliver up to 30% energy savings. The system is embodied by a set of RF hubs that provide power to automatically located sensor nodes, and relay data wirelessly to the building management system (BMS). The sensor nodes are flexible electronic labels powered by rectified RF energy transmitted by an RF hub and can contain multiple printed and conventional sensors. The system design overcomes limitations in wireless sensors related to power delivery, lifetime, and cost by eliminating batteries and photovoltaic devices. Sensor localization is performed automatically by the inclusion of a programmable multidirectional antenna array in the RF hub. Comparison of signal strengths while the RF beam is swept allows for sensor localization, reducing installation effort and enabling automatic recommissioning of sensors that have been relocated, overcoming a significant challenge in building operations. PARC has already demonstrated wireless power and temperature data transmission up to a distance of 20m with 71s between measurements, using power levels well within the FCC regulation limits in the 902-928 MHz ISM band. The sensor's RF energy harvesting antenna achieves high performance with dimensions of 5cm x 9.5cm.
TOPICS: Sensors, Dimensions, Design, Energy harvesting, Flexible electronics, Signals, Building management systems, Temperature

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